SU570055A1 - Device for checking of circuits - Google Patents

Description

one

The invention relates to computing technology, in particular, devices for controlling impulse circuits, mainly shift registers, ring and double-ended counters, logic converter circuits, and other circuits operating on a rigid temporary basis, on; no moving and sustained failures with indication of the Failed element.

This type of device is known - it is multi-element, and in addition, its circuit becomes much more complicated with increasing the length of controlled pulse circuits 1.

The closest technical solution to the invention is a device for monitoring pulsed circuits containing a group of triggers, an indicator and a pulse generator whose first signal is connected to the first input of the inhibit element, and the second output to the first inputs of the monitored and reference impulse circuits 2j.

The purpose of the invention is to simplify the localization of the defective item.

This is achieved due to the fact that the device contains a group of elements OR,

the OR element, the Delay Element, the intrigue and threshold blocks, the outputs of the controlled and reference impulses of the circuits through the group of the elements of the OR connection with the trigger group, the outputs of which btx are connected to the indicator and the inputs of the OR element, the output of the OR circuit or the threshold and the threshold the second input of the prohibition element, the by-pass of which is connected to the second bypass of the controlled pulse circuit and through the delay element to the second input of the reference pulse circuit.

The drawing is a block diagram of the proposed device.

The pulse generator 1 is connected to the inputs of the controlled 2 and reference 3 circuits. The clock frequency from the pulse generator is applied to both circuits through prohibition element 4 and to the reference circuit through delay element 5. The outputs 1 of the same elements of the controlled and reference circuits are connected to the inputs of the OR element, the outputs of which are connected to the inputs of the trigger group 7, the outputs of the trigger group are connected to the inputs of the OR element 8 The output of aneweirra OR 8 is connected through the integrating unit 9 and the threshold unit 1.0 with the prohibiting input of the element-ban 4. The outputs of the group of triggers are also connected to the inputs of the indicator 11. Device operation as follows. If both circuits are in good condition (monitored and standard signals from the outputs of one of the Nmavnig elements of the circuits are equivalent and just | in time with the help of element 5 5 for the time At npHat O, 5 T, where T is the period of the clock frequency. Triggers of group 7 before control starts When monitoring, group triggers operate in the counting mode | opposite to the initial state with the arrival of pulses from the controlled circuit, and return to the JHCXOAHoe state with the arrival of the corresponding pulses from the reference circuit In the STATUS opposite to the INITIAL, the triggers are each time during the time At, so that the capacity of the integrating unit does not have time to charge to the potential of the triggering unit. If one of the elements of the controlled circuit fails (the failure), the corresponding trigger of group 7 will remain in the position opposite to the initial one after the expiration of the time & t, when all other triggers have already returned to the initial state; The charge of the capacity of the integrating unit continues to potential. triggering threshold block. The parameters of the block are interpreted in such a way that it is valid until the next clock cycle of the next pulse. The threshold unit, triggered, prohibits the arrival of pulses of the clock frequency to both circuits and stops the operation of the device. The failed element is determined by the position, the triggers of group 7, the trigger associated with the failed element is in a state opposite to the original one, while all other triggers are in the original state. when monitoring binary counters, where there is no clock frequency, the threshold unit, when triggered, prohibits input of both impulses to both circuits, and the time shift between the pulses of both circuits is obtained by delaying the input pulses to the reference circuit. Formula and Breaches A device for controlling impulse circuits containing a group of triggers, an indicator. and a pulse generator, the first output of which is connected to the first input of the inhibiting element, and the second output to the first inputs of the monitored and reference impulse circuits, characterized in that, in order to simplify the localization of the faulty element, the device contains a group of OR elements, an OR element, a delay element , integrating and threshold blocks, and the monitored and reference impulse high voltage circuits through a group of elements OR are connected to the inputs of a group of triggers, the outputs of which are connected to the indicator and to the inputs of the element OR, you the element stroke —OR through the integrating and threshold blocks is connected to the second input of the inhibit element, the output of which is connected to the second input of the controlled pulse circuit and through the delay element to the second input of the reference pulse circuit. Sources of information taken into account in the examination: 1.Patent of England No. 1105243 G 4 C, 1968. 2. Author's certificate of the USSR No. 342192, M. C.O. 06 F 15/46, 1970.

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