SU552608A1 - Device for eliminating the consequences of failures - Google Patents

Description

The sign flag is connected to the input of the subsequent sign trigger, the output of the last sign trigger is connected to the first input of the block, the second input of which is connected to the third input of the device, the output of the block of lock is connected to the first output of the device and the first input of the data output block, the second input of which is connected to the control inputs of data transfer registers and with the fourth input of the device. The output of the data output unit is connected to the second inputs of a group of elements I, to the input of the counter, the first output of which is the third output of the device, and the second output of the counter is connected to the third input of the blocking unit.

Diagram of the device for eliminating the consequences of failures is shown in the drawing.

The device consists of block 1 of memory, registers 2 of data transfer, elements I 3, block 4 of data output, counter 5, block 6 of blocking, triggers 7 of sign.

The outputs of memory block 1 are connected in bit with the inputs of register 2. To the input of trigger 7 of register 2, a sign (operand or command) is received from the second input of the device. The outputs of the first register 2 are connected in a bit through the shift schemes with the inputs of the second register 2, etc.

The outputs of the last register 2 are connected bit by bit to the first inputs of the And 3 elements, the second inputs of which are connected to the output of the data output unit 4, the output of the trigger 7 of the last register 2 flag to the first input of the blocking block 6. The outputs of the AND elements are connected bit by bit to the inputs of the first register and to the second outputs of the device.

The first input of data output unit 4 is connected to the output of the blocking unit, the second input is connected to the control inputs of the data transfer registers and to the fourth input of the device, the output of the data output unit is connected to the input of counter 5 and the second input of AND 3 elements. The first output of counter 5 is the third output of the device. The second output of the counter is connected to the third input of block 6, the output of the block of block to the first input of block 4 of data output and to the first output of the device.

When there are no distortions in the DVR information (operands or commands), the memory read from block 1 is fed to the DVR devices for processing and written to the first register 2. In the subsequent information from the first register, with the memory access cycle, the In the first register, a new information is written, read from the memory in the next cycle, all the registers are filled in such a way that through

1 pins of access to the main memory in the registers will store all the information subject to processing at a given time in the digital computer. At the same time in the last register

2, information will be stored, the processing of which in the next cycle ends.

The information circulating in registers 2 is assigned the sign "I or" O (operand or instruction), which is stored in trigger 7.

If there is no error signal at the third input of the device, information from registers 2 is not used.

If, during processing, the information has been corrupted, as indicated by the signal arriving at the third input of the device, the block prevents the operation of the command number counter on the first output of the device and blocks access to the memory 1 (read and write data). The same signal allows the output of information from output register 2 through the group of elements And 3 to digital computers, if there is a sign, the "command.

In addition, information from the output register, regardless of the sign, is rewritten into the input register 2. Counter 5 is enabled by this blocking signal.

Through the clock ticks, if there is no distortion signal at the third input of the device, the blocking from the memory block and the command number counter is removed and the output from the output register is prohibited. The digital computer goes into the mode of normal operation with the memory block, starting with the address recorded in the counter of command numbers at the moment of its blocking. When the distortion signal is repeated, the correction attempt is repeated n times, as indicated by the counter overflow signal (the first counter output), which is fed to the interrupt circuit of the control unit of the digital computer and puts it into the diagnostic mode.

The proposed device provides effective correction of both distorted instructions and operands, eliminates the recording of corrupted data in the main memory, allows the program section to be repeated with distortions in the command number counter, improves the performance of the correction of distortions.

Claims (2)

1.Kagan BM, Kanevsky M.M. Digital computers and systems. M., “Energie, 1974, p. 648-652. 2. Avt. St. No. 189621, G 06F 11/00, 1965 (prototype).