SU532079A1 - Time Expander - Google Patents

Description

(54) EXTENDER OF TEMPORARY INTERVALS

A yen with the first input of the HE 3 inequality element, the output of which is the output of the entire device. The zero trigger output / is connected to the control input of key 2 and with the input of the logic element AND 4, and the single output to the unbalancing input of the switch 5, the working input of which through the switch 6 is connected to the output of the pulse generator 7. The output of the pulse generator It is also connected to the working input of the grip 8 and frequency divider 9, the output of which is connected to the zero input of the trigger 10 and the working input of the switch //.

Summing; the input of the reversible counter 12 is connected with the output of the key 5, and the subtracting input - with the output of the key I, the control section of which is connected to the output of the element I 4 and to the control input of the key 13 connecting the input u reset of the counter 12. The discharge outputs of the counter 12 are connected to the inputs of the NLI 14 logic element, the iKOTOporo output is connected to the second input of the terminal element I 4 and through the pulse shaper 15 to the second input of the element NO 3.

In addition, the single output trigger 10 is connected to the control input of switch 6, and the zero output to the control input of key 8, whose output through delay element 16 is connected to the single input of trigger 10.

Elements 1-4 and a of the aggregate (in the drawing, this part of the flowchart is encircled by a paragraph-jum) is from itself the control unit for the operation of the switches 5 and //, which serves to unlock the key.// on the gap between the rubbing of the key 5, and the moment when the counter 12 returns to its initial state. In terms of this device, this device can also be performed according to any other scheme, if only it can realize the functions indicated above.

The scheme works in the following way.

In the initial position, the resurrection counter 12 and the trigger / are in the zero state. At the same time, a high potential is maintained at a zero (upper in the figure) output bus. Not a trigger, therefore, key 2 is open. The logical element OR 14 is constructed in the same way that the high gain of its output is absent only when the counter 12 is in the zero state. Therefore, in the initial position at the output of the element And 4 there is a low potential, which locks the KEYS 13 and //. The trigger 10 —in the LMM position is in a single state, in which key 6 is open and key 5 is closed. This is due to the special features of the connection circuit of elements 6, 7, 8. 10. 16. The zero position of the trigger 10 (at which the 1 KEYCH 8 is open) is replaced by a single unit, barely at the output of the pulse generator 7, the first pulse-sec. This impulse passes through the key 8, arrives at the delay element 16, the delay impulse for a time shorter than the generator i-pulse period, and the co-circuit 16 enters the single trigger exit of the trigger 10 and translates it into a single state.

However, despite the open state of switch 6, the signals from the output of the pulse generator 7 to the counter do not go because of the state of switch 5, which is closed by a low potential from the zero trigger bus.

Suppose now that a short pulse arrives on the input bus of the device, which fixes the beginning of the time interval TJX to be converted. This impulse is through open, key 2 to logical inememeite of inequality NOT 5 nostunit; to the output device, with the same reference point of the transformed output signal, and will switch the trigger / into one state, with iK-OTopOiM; b CO | The KIY potential is set at its unit (.; Shzhni) output bus, so that key 5 is opened. From this moment on the summing input of the counter 12 through the keys 5 and 5 will begin to arrive im.pulsy frequency / o. K.Tyuchi // and 13 are still closed, because (although from the moment of arrival at the count of 12 nerves, impulse is installed V. the height of the potential at the output of the logic element NLI 14) even before this, from the first input of the logical element H 4 - high potential stacks are removed; to the trigger / does not occur in a single state), i.e. high potential at the output of element 4 is still absent.

It is easy to see that in -time m them in counter 12 should be recorded the number of impulses L / otvu If m is small, and the division factor k of the frequency divider 9 (k equals the pulse duration conversion factor) is large time - |, x sysial output frequency divider 5 is absent.

The second impulse that arrives at the hardware code bus of the device and indicates the termination of the t m, does not pass through the closed key 2, returning only the trigger / to the initial zero state. Due to this, a high notional is supplied by Q and to the first input of the logic circuit 4, whereby the keys // and 13 are hidden. At the subtracting input of counter 12, the pulses of the iC output of the divider start to flow.

/ - /.-

frequency 9 with a frequency of tenor / i, 1 che5k. /

cut key //. These i-pulses continue to flow through the key, // as long as you like. Ee: as counter 2 does not return to its original zero state. Then, an unspeakable potipial with 1zg-: ode elemepta

0 14 is removed, so that the high potential disappears at the output of the logical element "I-I 4, and; the key // n 13 is closed.

At the moment of the jump-like transition of the potential of the output of element 14 to the level

The 5th element / 5 forms a short pulse passing through the non-marginal element 3 on the output bus of the device. Since the period of IMPulses at the output of the frequency divider is k times longer, che: m is the period of pulses at the generator output, and the number of pulses is received; on the reversible counter in the mode and subtraction are equal, the time interval between the beginning and the pulse at the element output 15 is k times longer than the length of the TBX. If the duration of the input impulse Tcc is large or small, then the pulses at the output of divider are 9 hours, but they are, until the pulses of the generator 7 reach the summing input of the reversible counter 12 In this case, 1ka Each impulse that has appeared at the output of the divider until the end of the process is summed, arrives at the zero input of the trigger 10, flips it to the zero position, with iKoropoM the key 6 is closed with a low lotion aia single, the output of the thrilger 10, and 1 the key 8 opens with a high: zero potential m trigger output 10. This state of the keys 6 and 8 leads to the fact that the next generator pulse through KEY 6 to the summing input of the counter: does not exceed, but passes through the key 8 and lingers in the delay element 16 (for a time longer than the pulsegenerator 7), enters the single input trigger 10. The trigger re-opens the key 6 and closes the key 8.

Thus, the sum of impulses, which corresponds to the number A / g, is deducted from the amount stored in counter 12 during the summation process itself, which corresponds to the number A / g, (.

TO

The time interval between pulses at the output of element 3 will be the value

   If the TDX interval is longer than the time period T, the pulse presentation time of the signal is m (i.e., despite the condition of input max 7 with a high conversion factor, device B

mode "limiting.

In this case, the circuit works identically to the one described above, but IK does not have time to return to the initial state when the end of the next period T is completed. To set the device to its initial state (this must be done before the beginning of the next interval Tzx, since in this period T may already be -in, and the device circuit must produce the correct result in the same tact), using the input pulse indicating the origin of the next Tvh- This pulse, if the trigger / is in the zero state, and C4eT4HiK 12 is not in the zero state, passes through the signal opened from the output of the logical element "And 4 key 13 to the reset input of the counter 12, so that open key 5 the counter is in the zero position (the trigger / must have a lower speed than the trigger triggers, otherwise you will need to add a second; delay elements). The pulses at the output of the element of disparity 3 in this case do not appear, starting with a pulse, after which the device enters the "restriction" mode, since in this mode the pulses pass to both its inputs almost simultaneously and "extinguish each other."

The contents of the counting 12; at the time of termination of the TBX, the input time is numerically null pulsed and can be used to enter the digital part of the system using the proposed device.

Claims (2)

1.E. V. L agrache.v. “.Hanning transducers of single signals. M .. “Energy. 1974, p. 126. 2. Avt. sz. Up to 312375, AV. Cl. G 04 F 10/04, 1971 (prototype).