SU1675875A1 - Device for information input - Google Patents

Abstract

The invention relates to computing and can be used to enter information into computers and into terminal devices. The aim of the invention is to simplify the device. The device for entering information contains a block 1 of switching elements, a multiplexer 2. first 3, second 5 and third 11 counters, decoder 4, first 6, second 12 and third 13 triggers, first 7. second 9 and third 10 elements And, switch 8. 1 il.

Description

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The invention relates to computing and can be used to enter information into computers and terminal devices.

The purpose of the invention is to simplify the device.

The drawing shows a block diagram of the device.

The device contains a block 1 switching elements, multiplexer 2, the first counter 3, the decoder 4, the second counter 5, the first trigger b, the first element And 7, the switch 8, the second 9, the third 10 elements And, the third counter 11, the second 12 and the third 13 triggers, the first 14 and second 15 separation elements on the diodes.

The information input device operates as follows.

In the initial state, the decoder 4, controlled by the second counter 5, provides a sequential flow of logic level 1 to the inputs of block 1, and multiplexer 2, controlled by the first counter 3, polls the switching elements. Since in the initial state the contacts of all switching elements are open, the logic input O is applied to the first input of the second element I 9. Second trigger 12 is in the zero state, keeping the third counter 11 in the zero state and allowing the third trigger to go to the reset inputs 13 and the first counter 3 reset pulses, forming the third element 10 at the moment when logic level 1 appears at the output of the decoder 4 1. The logic level O received at the control input of the switch 8 from the output of the third trigger 13 It treats the passage of the recording of the first trigger 6 pulses from the first output of the decoder group 4. Since the information input of the first trigger 6 receives the logic level O from the output of the third counter 11, the first trigger b remains in the zero state, blocking the formation of the first element and 7 pulses zeroing the second trigger 12 at the moment of simultaneous occurrence of the logic level 1 at the output of the decoder 4 and the first output of the first counter 3.

When the contacts of one of the switching elements of block 1 are closed at the time of its addressing by the decoder 4 and multiplexer 2, pulses from the output of multiplexer 2 begin to flow to the first input of the second element 9. The second element 9 passes the specified pulses to the installation input of the second trigger 12 only at time points corresponding to the level of logic 1 on the counting input of the first counter 3, when the switching process of the decoder 4 and multiplexer 2 is already completed, since the counters 3 and 5 are triggered by

negative pulse front. The second trigger 12 when the first pulse arrives from the output of the second element And 9 goes into one state, forms an information input command, the code of which is set at the outputs of counter 5 (corresponds to the group number of the decoder outputs 4, and varies from 1 to m) and the outputs of counter 3 (corresponds to the number of the switching element connected to the specified output group number of the decoder 4, and varies from 1 to n), and blocks the third element And 10.

In this case, the reset input of the third trigger 13 does not receive pulses {level

0 logical 1) and the input of the installation in About the third counter 11 also does not receive a reset pulse, and a third of the counter 11, triggered by a positive edge of the pulse, goes into pulse counting mode,

5 arising at the output of the decoder 4 after the completion of the next interrogation of switching elements. When counting a given number of pulses at the output of the third counter 11, a level is formed.

0 logical 1. which is fed to the input of the first trigger 6,

When a logic level 1 appears at the first output of the decoder group 4 (which corresponds to the beginning of the polling cycle of the com mutational elements), the first trigger 6 goes to the single state and removes the blocking of the first element 7. At least one switching element is in the closed state, then during the polling cycle, the input to the O of the first trigger 6 will necessarily receive a logic level 1 and return the trigger 6 to the zero state by the time it appears at the output of the decoder 4 logic level 1. With

In this, the first element AND 7 is again blocked by the logic level O received from the output of the first flip-flop 6, which prevents the second flip-flop 12 from being reset to its original state.

0 If the contacts of the switching element remain closed until the end of the interrogation cycle, then at the output of the third counter 11 a signal is formed that is full (logic level 1), arriving at

5 its blocking input and the installation input of the third flip-flop 13. At the same time, the counter 11 is blocked and stops the pulse counting, while maintaining the logic level 1 output, which is fed to the input of the third flip-flop 13 and the information input

the first trigger 6. The logical level 1 from the output of the third trigger 13 enters the control input of the switch 8 and connects to the recording input of the first trigger 6 the intermediate output of the decoder group 4,

If the contacts of the switching element connected to the specified intermediate output of the group of outputs of the decoder 4 or to one of the following outputs of the group of outputs are in the closed state, the second trigger 12 does not change its state before opening the contacts, since the first trigger b set by the write pulses coming from the intermediate output of the output group of the decoder 4 is reset to the zero state by the pulses coming from the multiplexer 2 at the time of polling the switching element with closed contacts, which prevents the second trigger 12 from being reset.

If the contacts of the switching element connected to one of the outputs of the output group of the decoder 4 preceding the intermediate output of the output group are in the closed state, the first trigger b is set to one state by the pulse coming from the intermediate output of the output group of the decoder 4 after the moment of arrival of the reset pulse from multiplexer 2, and at the moment of simultaneous appearance of logical 1 at the output of the decoder 4 and the first output of the first counter 3, the first element And 7 forms a level at the output logic 1, the second flip-flop 12 returns to null state,

If the contacts of the switching element are still closed, then the pulse generated by the second element AND 9 again brings the second trigger 12 into the unit state. Since at the output of the third flip-flop 13 the level of logic 1 is maintained, after the occurrence of the level of logical 1 at the output of the third counter 11, the first element And 7 again sets the second flip-flop 12 to the zero state. The specified device operation mode is retained until the contacts of all switching elements are opened. Moreover, after returning the second trigger 12 to the zero state, it is not set to one during the entire interrogation cycle of the switching elements, and the third element AND 10 at the time of the appearance of the logical unit at the output of the decoder 4 generates the output level logical 1, setting the third trigger 13 and the first counter 3 to the zero state, then the device

to enter information, it returns to its original state and remains there until the next closure of the contacts of one of the switching elements.

Claims (1)

The device for inputting information contains a block of switching elements, the first, second and third counters, the first, second and third elements AND, the first and second triggers, the switch, the decoder and the multiplexer, whose information inputs are connected to the outputs of the block of switching elements, addressable the inputs are with the outputs of the first counter, and the output is with the first input of the second element I and with the reset input of the first trigger, the inputs of the decoder are connected to the outputs of the second counter, the counting input of which is connected. it with the first output of the first counter, a group of outputs of the decoder is connected to the outputs of the switching unit, the first output of the group of outputs of the decoder is connected to the first input of the switch, and the intermediate output of the group of outputs of the decoder is connected to the second input of the switch, the output of which is connected to the synchronous input of the first trigger, output which is connected to the first input of the first element And, the third input of which is connected to the first output of the first counter, the output of the decoder is connected to the counting input of the third counter, to the first input of the third element Peak to the second input of the first element I, the output of which is connected to the reset input of the second trigger, whose information input is connected to the output of the second element I, the inverse output of the second trigger connected to the second input of the third element I and to the reset input of the third counter, the second the output of which is connected to its blocking input, the outputs of the first and second meters are outputs of the device group, the direct output of the second trigger is the output of the device, characterized in that it is simplified devices, the first and second separating elements on the diodes are entered into it, the third trigger, whose information input is connected to the second output of the third counter, the reset input to the output of the third element And, and the output connected to the control input of the switch, the output of the third element And connected to the input reset the first counter, the first output of the third counter is connected to the information input of the first trigger, the anode of the first diode is connected to the output of the multiplexer, and the cathode is connected to the synchronous input of the first trigger, the anode of the second diode is connected the second output of the third counter, and the cathode to the data input of the first flip-flop.