SU507935A1 - Switch Management Device - Google Patents
Switch Management DeviceInfo
- Publication number
- SU507935A1 SU507935A1 SU2076836A SU2076836A SU507935A1 SU 507935 A1 SU507935 A1 SU 507935A1 SU 2076836 A SU2076836 A SU 2076836A SU 2076836 A SU2076836 A SU 2076836A SU 507935 A1 SU507935 A1 SU 507935A1
- Authority
- SU
- USSR - Soviet Union
- Prior art keywords
- pulses
- decoder
- delayed
- management device
- inverter
- Prior art date
Links
Landscapes
- Electronic Switches (AREA)
Description
с выхода дифференцирующей цепи 5 запускает задержанный мультивибратор 6, с выхода которого снимаютс импупьсы, по длительности равные паузе между импулЬ сами опроса t . Длительность импульсаfrom the output of the differentiating circuit 5, starts the delayed multivibrator 6, from the output of which impulses are removed, equal in duration to the pause between the pulses of the interrogation t. Pulse duration
с задержанного мультивибратора 6 можно регулировать в пределах заданного периода Т ступен ми и плавно.From the delayed multivibrator 6, it can be adjusted within a predetermined period by T steps and smoothly.
Пройд через инвертор задержанных импульсов 7, эти импульсы вместе соPass through the delayed inverter inverter 7, these pulses together with
снимаемыми с выходов счетчика 2 поступают на схемы совпадени дешифратора 3, обеспечива формирование импульсов опроса с длительностью, равной Т - t . При (Изменении длительности импульса опроса, период генератора тактовых импульсов 1 остаетс неизменным, так как длительност паузы t п обеспечивает задержанный муль- тив 1братор 6, а длительность импульса опроса , образуемого после дешифратора 3, определ етс вычитанием длительности импульса паузы t j-j из периода Т генератора тактовых ик;пульсов 1.taken from the outputs of counter 2 are fed to the coincidence circuit of the decoder 3, ensuring the formation of polling pulses with a duration equal to T - t. When (Changing the polling pulse duration, the period of the clock pulse generator 1 remains unchanged, since the duration of the pause tp is provided by the delayed multiplier 1 of the 6, and the duration of the polling pulse formed after the decoder 3 is determined by subtracting the pause pulse tjj from the period T clock generator; pulses 1.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SU2076836A SU507935A1 (en) | 1974-11-21 | 1974-11-21 | Switch Management Device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SU2076836A SU507935A1 (en) | 1974-11-21 | 1974-11-21 | Switch Management Device |
Publications (1)
Publication Number | Publication Date |
---|---|
SU507935A1 true SU507935A1 (en) | 1976-03-25 |
Family
ID=20601256
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SU2076836A SU507935A1 (en) | 1974-11-21 | 1974-11-21 | Switch Management Device |
Country Status (1)
Country | Link |
---|---|
SU (1) | SU507935A1 (en) |
-
1974
- 1974-11-21 SU SU2076836A patent/SU507935A1/en active
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