SU506017A1 - Communication device - Google Patents

Description

one

The invention relates to computing technology, can be used in data processing systems, control systems, and in the information measuring complexes.

A device for data exchange is known, which contains a switch switch connected to its first input and output, an address counter, the first input and output of which are connected respectively to the second input and output of the device, the control unit, the outputs of which are connected respectively to the control inputs of the switch channel -z, the address counter, the third, fourth, and fifth outputs of the device, the inputs to the third and fourth inputs of the device, the second output of the address counter is connected to the corresponding input of the channel switch.

The known devices are intended for serial communication between the external device and the random access memory (RAM).

The external device selected by the program is connected to the RAM using the control unit by setting the zone address in the RAM, the external device number code and the sign of the exchange mode (receive or transmit). Further exchange continues only with the connected device. To switch to exchange with another device, you must interrupt the program of the processor and repeat all the operations for connecting a new device.

The purpose of the invention is to increase the performance of the device.

The proposed device is distinguished by the fact that it introduces blocks of priority selection of channels for the end of exchange and priority selection of channels of clock signals, commutators and communication recorders, the outputs of which through the first switch are connected to the input of the channel switch, the inputs are respectively to the output of the control unit and the output of the second the switch, the inputs of which are connected to the corresponding output of the control unit, the fifth input of the device, the first outputs of the priority selection blocks of the exchange end channel and the priority one The selection of clock channels, the second outputs of which are connected to the corresponding inputs of the control unit, the inputs to the sixth and seventh inputs of the device, respectively, the output of the first switch is connected to the BTOpoMiy input address counter B.

This makes it possible to switch exchange channels with external devices without the participation of the processor and without interrupting its work program.

The drawing shows a diagram of the device.

The device contains a block of priority selection of sync channel 1, a block of priority selection of exchange termination channels 2, control block 3, switch 4, communication registers 5, switch 6, address counter 7, switch cavals 8.

The device works in four modes.

To establish a connection of a random access memory (RAM) with external devices on input 9 by the signal "command control unit 3 gives permission to write the code of the channel number on input 10 to one of the communication registers 5. The number of communication registers is determined by the maximum number of leads the exchange of external devices, each register strictly corresponds to the address counter 7. On the input 11, the counter is supplied from RAM by a sign (write / read) and the code of the starting address of the RAM, from which information will be written or read from s is recorded by a command from the control unit 3. The command of this block in the channel 8 is sent to switch service information, and the selected external apparatus is sent synchrotron-mpuls request to exchange information. In order to establish communication with other external devices, the cycle is repeated, but the channel number code and the RAM address code are recorded in the subsequent communication registers 5 and their corresponding address counters 7.

The time when the external device is able to receive information (recording mode) or select the next information word for transmission (read mode), in the priority selection of the channels of the sync signals 1, is received at the input 12 of the sync signals. Unit 1 selects the channel with the highest priority from all the channels that sent the sync signals, and through control unit 3 (exchange mode) and switch | p 4 selects the appropriate communication register and address counter. At the same time, the channel switch 8 connects the selected external device to the RAM in a direction dependent on the sign (write or read) from the address counter.

The second clock of the control unit 3 sends to RAM together with the address of the RAM and the sign (write / read) a call to RAM, after which the latter is in the waiting mode.

With the arrival of clock pulses at input 13, which means execution of the command to access the RAM, control unit 3 increases the address in the corresponding address counter by one, and sends the external request request signal to the B1 device via the corresponding channel the memory access time does not exceed 3-5 microseconds.

Thus, the exchange of one word takes 5-8 microseconds, which is significantly less than the speed of the external device. Consequently, during this period of time, the word can be exchanged with other external devices. The exchange of RAM with external devices is determined by frames specified either by the operator or by zones of external devices.

At the end of the frame external devices

send to the block 2 signal "the end of the exchange. Of all the channels that sent signals, block 2 selects the channel with the highest priority. The control unit 3, having received from block 2 the signal for the end of the exchange, resets the corresponding communication registers and address counters.

Modes are selected priority (in the case of simultaneous arrival of signals on the installation of all modes). To increase the reliability of information transmitted in the device, monitoring and analysis of faults are possible. A malfunction signal is generated only with a critical number of failures determined by the reliability and reliability of the information. With

Failure information is received again by the same communication code and RAM address.

Claims (1)

Invention Formula A data exchange device containing a channel switch connected to its first input and output, an address counter, the first input and output of which are connected respectively to the second input and output of the device, a control unit whose outputs are connected respectively to the control inputs of the channel switch, address counter the third, fourth and fifth outputs of the device, the inputs to the third and fourth inputs of the device, the second output The address counter is connected to the corresponding input of the channel switch, characterized in that, in order to increase the output of the driver, it includes blocks for the priority selection of the channels for the end of the exchange and the priority selection for the sync channel signals, switches and communication registers, the outputs of which are connected to the input through the first switch channel switch, inputs-respectively to the output of the control unit and the output of the second switch, the inputs of which are connected to the corresponding output of the control unit, the fifth input of the device, bubbled outputs priority channel selection and exchange termination units prioritizing the selection of the clock channels, the second outputs of which are connected to the corresponding inputs of the control unit, the inputs to the sixth and seventh inputs of the device, respectively, the output of the first switch is connected to the second input of the address counter. 13 / 12