SU479154A1 - Shift register with pulse power - Google Patents

Description

Suppose that a positive impulse from the sequence φ acts on the bus 10. In this case, the trigger cell 1 operates in the mode of storing and transmitting information. Suppose that the transistor 3 of the trigger cell 1 is open and saturated, and the transistors 4 and 5 are closed.

In this case, a small (about 1/5) part of the current flowing through the resistor 8 goes to maintain the saturated state of transistor 3. And the rest (about 4/5) goes to turn on the switching transistor 6. Turning on the switching transistor 6 of the trigger cell 1 causes the closing of the transistors 3 and 6 of the trigger cell 2.

With the arrival of a positive clock pulse on bus 11 from the sequence F, the transistor 4 of the trigger cell 2 is opened by current through the resistor 7, and the transistor 3 remains closed. This direction of the transient in cell 2 is provided by the charge accumulated in the base of the switching transistor 6 of the trigger cell 1, which keeps the base potential of the transistor 3 cell 2 at a low level while the transistor 4 is turned on. The trigger cell 2 goes into the information storage and transmission mode.

Such a construction of the shift register cell allows one to reduce the cell size on a chip, because two transistors can be placed in one isolated area: the storage transistor of this cell and the switching transistor of the previous cell, since their collectors are connected together. Thus, one register cell requires only two isolated regions on the chip of the integrated circuit for active components instead of four in the known registers.

In addition, the register circuit has a higher speed, since the main part of the current of the collector resistor (acolo 4/5 of the total current) goes on switching on its transistor, and only about 1/5 of the total current is spent on maintaining the saturated state of the storage transistor. This is due to the fact that during a clock: pulse operation, the next cell

de-energized and, therefore, the collector current of the switching transistor is practically zero. The voltage across the emitter junction of the switching transistor decreases, resulting in the above

redistribution of currents.

The disconnecting diodes are designed to prevent the dissipation of the charge accumulated in the base of the switching transistor after the end of the clock pulse. Due to this, it is possible to reduce the shape and duty cycle requirements of the clock pulses.

Subject invention

A shift regiSTT | p with a voltage pulse, each bit of which contains two trigger cells, each of which consists of two transistors with cross-links and resistors in the collector circuit and two switching transistors, characterized in that in order to increase speed and crystal size reduction

integrated circuit, the point of connection of two resistors of each cell is connected via a cutting diode to one of the pulsed power supply terminals, and the collectors of the transistors of the previous trigger cell are connected to the bases of the switching transistors of the subsequent trigger cell.

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