SU1547028A1 - Device flip-flop - Google Patents

Abstract

The invention relates to a pulse and computer technology and can be used in the manufacture of scaling circuits, memory registers and random access memory. The purpose of the invention is to simplify the trigger. The goal is achieved by the fact that the trigger contains a second diode 8 with appropriate connections. A diode 8 connects the second emitter of transistor 1 to its base. As a result, transistor 1 can perform not only the functions of transmitting the recorded information, but also the function of one of the arms of the bistable cell. 1 il.

Description

The invention relates to a pulse and computer technology and can be used in the production of counting devices, memory registers and random access memory devices.

The purpose of the invention is the simplification of the DV-trigger.

The drawing shows an electrical · diagram of the proposed DV-trigger.

DV trigger. contains a three-emitter first transistor 1, second transistor 2, resistors 3-6, first 7 and second 8 Schottky diodes, information 15 D-input 9, V-input-10 samples, clock T-input 11, inverse output 12 and bus 13 power .

DV-trigger works as follows; 20

In the initial state, there are no signals at inputs 10 and Ί1 of the DV trigger, which corresponds to zero voltages at the second and third emitters of transistor 1, which is 25, depending on the zero or single voltage level, supplied to its base through the feedback circuit through the resistor for 6 s collector transistor 2, can bcgg open or closed. At a high voltage level, the current from the collector of transistor 2 flows through the resistor 6 into the base of transistor 1, opening its base-emitter junctions (second and third /, and therefore the collector-emitter junction, which shunts the base current through resistor 4 of transistor 2, which at a zero voltage level, the base-emitter junctions of transistor 1 are locked, the latter is closed and does not bypass the base current of transistor 2, which maintains the latter in open state. rigger will not change with changes in the information input of D-9 when there is no at least one of signals. V-10 input sample clock and the T input 11.

Information is recorded in the DV trigger at a high voltage at inputs 10 and 11, when the second and third emitters of transistoo 1 and Schottky diode 7 are locked, since at a low level at input 11 and a high level at input 10, diode 7 is open and does not allow the current from input 10 to flow into the base of transistor 1 and change the state of the DV-trigger with zero information recorded in it fg.e. reliable storage of both single and zero information is provided.

At high voltage levels at both inputs 10 and 11, the Schottky diode 7 is locked and the high potential from input 10 is fed through resistor 3 to the base of transistor 1, allowing information from input 9 to be written to the DV trigger.

If at the input 9 there is a single information, then the transistor 1 will be locked and the base current through the resistor 4 will open the transistor 2, keeping it open even after the clock pulse ends at the input 11, since the zero potential from the collector of the transistor 2 through the resistor 6 will not open the closed transistor 1.

If zero information is present at input 9, then the transistor 1, under the action of the base current from input 10 through the resistor 3 and the diode 8, opens and shunts the base current through the resistor 4 of transistor 2, leading to the closing of the latter and the appearance of a high potential on its collector, which creates through the resistor 6 additional basic feedback current, which will keep the transistor 1 open after the end of the clock pulse.

Thus, the proposed device functions as a DV trigger with inverse output 12 and recording information on a high level of a clock signal with a delay of one clock cycle in the presence of an enable signal at input 10, and at low levels at inputs 10 and 11, the DV trigger stores recorded information.

The normal operation of the DV-flip-flop is ensured when the signal at input 10 in duration overlaps the signal at input 11 “Schottky diodes is—” are used in the trigger for speed reasons. When using a trigger in the memory cells of random access memory, input 10 performs the function of an address input _<p .

Claims (1)

.Formula invention DV-flop comprising two transistors, four resistors and a first diode, a cathode of which is the cycle ⁵ '15 · vn input of flip-flop, an information input of which * is the first emitter of the first transistor, whose collector is connected to the base of the second transistor and the first terminal of the first a resistor, the second terminal of which is connected to the trigger power bus and connected to the first terminal of the second resistor, the second terminal of which is the trigger output and connected to the collector of the second transistor, the emitter of which is connected to the trigger potential zero bus, the first output of the third resistor is connected to! 8 '6 the anode of the first diode, characterized in that, in order to simplify the trigger, it contains a second diode, the anode of which is connected to the anode of the first diode, and the cathode is connected to the base of the first transistor and the first output of the fourth resistor, the second output of which is connected to the collector of the second transistor, the second output of the third resistor is the input of the trigger trigger and connected to the second emitter of the first transistor, the third emitter of which is connected to the cathode of the first diode a.