SU435552A1 - DEVICE FOR REDUCTION OF EXTENSION INFORMATION - Google Patents

Description

one

The invention relates to information transmission means and is intended to compress information.

Devices for reducing redundancy of information are known, including current and maximum sample registers, a subtractor, arithmetic units, a multi-input one-shot, electronic keys, and OR schemes.

The low speed of the device is caused by the fact that the actions occur with the digits equal to the number of bits of the code of the current sample.

The aim of the invention is to improve the speed of the device.

This goal is achieved by the fact that the aperture register, electronic difference keys and aperture keys and the decryptor are entered into the proposed device. Irichem digital output of the first and output of the second arithmetic blocks, respectively, through electronic keys of the aperture and difference and the second circuit “OR are connected” to the first input of the aperture register, the second input of which is connected to the first circuit OR to the output of the output arithmetic unit. The output of the aperture register is connected to the input of the first arithmetic unit. The second control output is connected to the second input of the electronic key of the aperture. The second input of the electronic difference key is connected to the inputs of the first and second arithmetic units and the decoder, the output of which is connected to the third input of the one-shot.

The circuit of the device is shown in the drawing, where it is indicated: 1-register of the current sample, 2 - input of register entry 3 of the maximum sample, 4 - first input of the subtractor 5, 6 - control input of register 3 of maximum

samples, 7 - the second input of the subtractor 5, 8 - the decoder, 9 - the first arithmetic unit, 10 - the second arithmetic unit, 11 - the aperture register, 12 - the digital output of the first arithmetic unit 9, 13 - the electronic key of the aperture, 14 - the first control output arithmetic unit 9, 15 - second control output; arithmetic unit 9, 16 - one-shot, 17 - control input; arithmetic unit 10, 18 - electronic difference key, 19 - OR circuit, 20 - first output electronic key, 21 - second output electronic key , 22 - output arithmetic unit, 23 - input clean ki apertures register, 24 - circuit "OR.

The device works as follows. Register 1 of the current sample at regular intervals receives the digital codes of the samples. From register 1, the current sample codes are rewritten on input 2

write to the maximum sample register 3

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and to the first input of the subtractor 5. Recording to register 3 occurs when there is a signal at its control input 6. The signal from register 3 goes to the second input 7 of the subtractor 5. The difference with the sign goes to the input of the decoder 8 and to the inputs of the arithmetic units 9 and 10 The arithmetic unit 9 finds the difference between the values received from the outputs of the aperture register 11 and the subtractor 5. The code of this difference is transmitted from the digital output 12 of the arithmetic unit 9 to the signal input The input of the electronic key of the aperture is 13. If the difference calculated by the arithmetic unit 9 is negative, the signal appears at the first control output 14, if a negative value is transmitted from the subtractor, a second signal appears at the second control output 15 polarity. The signal at the second control output 15 is negative when the difference, found by the arithmetic unit 9, is exceeded, the tolerance value and positive if there is no such excess. A positive signal opens the electronic key of the aperture 13, and a negative one triggers the one-shot 16. The arithmetic unit 10 generates control signals with a non-negative code transmitted from the subtractor 5 and a signal from the first control output 14 of the arithmetic unit 9 at the control input 17 of the arithmetic unit 10. exceeding the tolerance value of the code transmitted from the subtractor 5 produces a negative control signal, and in the absence of such an excess a positive one. The negative signal triggers the one-shot 16, and the positive opens the electronic key of the difference 18, the input of which is fed from the output of the subtractor 5. The signals from the outputs of the electronic keys 13 and 18 go to the OR 19 circuit, from which they go to the input of the aperture register 11. The decoder 8 generates a negative signal when there are units in the bits of the difference, higher than the highest tolerance bit, equal to one. The signal from the output of the decoder is fed to the launch of the one-shot 16.

The signal of the one-shot 16 unlocks the output electronic keys 20 and 21, through which the contents of registers 3 and 11 are transmitted to the output arithmetic unit 22. It divides the contents of the register of aperture 11 into two and subtracts the result from the contents of the maximum sample register 3. The difference found is to be transmitted.

From the output of the output arithmetic unit 22, the signal is fed to the input 23 of the cleaning register of the aperture 11 and the scheme "OR 24,

the other input of which is supplied from the second control output 15 of the arithmetic unit 9. A signal at the input 23 of the aperture register 11 ensures that all zeros are written to this register. The signals from the output of circuit 24 are fed to control 6 of the current sample register 1. Thus, the current sample code is written to register 3 and zeroes are written into aperture register 11 — the initial setting.

This implementation of the proposed device by 25-50% increases its speed.

Subject invention

A device for reducing the redundancy of information containing a register of the current sample, the output of which is connected to the input

 write the maximum sample register and to the first input of the subtractor, the output of which is connected to the inputs of the first and second arithmetic blocks, the first control output of the first arithmetic block is connected

to the control input of the second arithmetic unit, the output of which is connected to the first input of the one-shot, the second input of which is connected to the second control output of the first arithmetic unit and through the first

the OR circuit with the control input of the maximum sample register, the first inputs of the first and second output dongles are interconnected and with the one-vibrator output, the outputs of the dongles are connected to the corresponding inputs of the output arithmetic unit whose output is connected to the first OR circuit, the output of the maximum register sampling connected to the second inputs of the subtractor and the second output

an electronic key, and a second OR circuit, characterized in that, in order to increase speed, an aperture register, electronic difference and aperture keys and a decoder are entered into it, the digital output of the first and the output of the second arithmetic unit are respectively connected to the electronic keys of the aperture and difference The outputs of which are connected via the second OR circuit to the first input of the aperture register, the second input of which is connected to the first OR circuit and the output of the output arithmetic unit; the aperture register output is connected to the second input of the first output electronic key and the second input of the first

an arithmetic unit whose second control output is connected to the corresponding input of the electronic key of the aperture; the second input of the electronic difference key is connected to the inputs of the first and second arithmetic units and the decoder, the output of which is connected to the third input of the one-shot,