SU461418A1 - Device for reproducing relay hysteresis characteristic - Google Patents

Description

one

The invention relates to computing.

Devices for reproducing a hysteresis relay characteristic are known, comprising a bit adder, a code normalizer and a code sign indicator, connected in cascade, and a key block.

The proposed device differs from the known ones in that the first and second groups of inputs of the discharge adder are respectively connected to the argument inputs and inputs of the device threshold, the third group of inputs of the discharge adder is connected to the inputs of the device zone through the first key block, the control input of which is connected with the output of the code sign indicator and the control inputs of the second and third key blocks, the groups of inputs of which are respectively connected to the first and second inputs of the device and the group of outputs of the second th and third key blocks are connected to the outputs of the device.

This implementation has improved the accuracy of the device.

FIG. 1 shows a block diagram of the device; in fig. 2 given the types of hysteresis characteristics.

The device contains the discharge adder 1, the normalizer code 2, the indicator of the sign of the code 3, blocks of keys 4-6, the inputs of the argument 7,

the threshold inputs 8, the inputs of the device zone 9, the first inputs of the restriction 10 and the second inputs of the restriction 11 of the device, the outputs 12 of the device.

The device is designed to implement two-digit characteristics such as hysteresis (Fig. 2, b, c, d,) and in the particular case - branches of the relay characteristics (Fig. 2, b) and symmetrical hysteresis characteristics

(fpg. 2, g).

The arguments, functions, and characteristic parameters of the characteristics to be implemented are specified in the form of character codes (in bit form). The position code is taken under the sign code here, the icoTOporo bits are represented by positive or negative polarity.

The device works as follows. Suppose the code inputs are 8-11

the sign codes of the parameters of the realized curve Аб / гь YI and YZ are given. Suppose that the value of the argument A at the input of the argument 7 satisfies the condition X.Xz, then the output of the bit adder 1 will be the value

the sum of J-Ai 0 and after the normalization of this sum in the normalizer of code 2, the indicator of the sign of code 3 will generate at its output the signal “O. The key blocks 4 and 6 will be in the off state, the key block 5 in the on state

state, and the output of the device 12 will be

the value of the code Y- ,, connected to the second input of the limitation 11 of the device. The image point will be located on the lower branch of the characteristic (see Fig. 2, b, c, d). When the argument code is increased to a value, the sum sign changes and at the output of the code 3 sign indicator, the signal "1" turns on the key blocks 4 and 6, the key blocks 5 go off. At the output 12 of the device, the YI code connected to the first input of the limit 10 is connected. At the same time, the h code from the input of zone 9 is connected to the input of the discharge adder 1 and the device triggers the threshold to the value of Xz. characteristics will occur when the argument passes not through the value of X, but through the value of Xz.

The device can reproduce other two-digit characteristics, if the inputs of restriction 10 and AND include codes that are functionally dependent on argument X. Thus, in FIG. 1, and the view of the characteristic implemented by the device is shown, when the first input of restriction 10 is an argument code with a sign:: -X, and the second input of restriction 11 is an argument code with the sign -J-: 4- The resolution of the device with respect to thresholds The triggers Xi and Xz are equal to 1s in the representation of the argument.

Subject invention

A device for reproducing a relay hysteresis characteristic containing a bit adder, a code normalizer and a code sign indicator connected in series and key blocks, characterized in that, in order to improve the accuracy of the device, the first and second groups of inputs of the bit adder are respectively connected to the inputs of the argument setting and the device norm, the third group of inputs of the discharge adder is connected to the inputs of the setting of the device zone through the first block of keys, the control input of which is connected to the output A code indicator indicator and control inputs of the second and third key blocks, the inputs of which are connected to the first and second inputs of the device limit assignment, respectively, and the output groups of the second and third key blocks are connected to the device outputs.