SU126305A1 - A method for performing mathematical operations on shift registers and a device for implementing this method - Google Patents

Description

Methods are known for performing mathematical operations on digital differential analyzers that use binary positional number systems with the discharge-weight principle of coding numbers.

The proposed method of performing mathematical operations differs from the known ones by the use of the non-countable numbering system, where the weight principle is not applicable. B. All the numbers of the natural row and correspond to the sequence of codes in the code ring. This makes it possible in a number of cases to simplify the corresponding mathematical devices.

The essence of the method is that two shift registers with logical feedbacks are used, the first of which of type a is a sensor of codes in accordance with a sequence of natural numbers of numbers and operates in a closed loop mode, and of the second type in conversely codes entered into it in the corresponding number of pulses. The logical feedback of the second register is inverse with respect to the first and operates in open-loop mode.

FIG. la and 1c are shown shift registers covered by logical feedbacks of the type an and n, respectively; And - the pattern of the sonpatheni. The successive states of ferrites A, B. C and D are shown in tables.

FIG. Figure 2 shows a typical scheme for switching on registers of quotas, where the input signal is supplied to the input signal of the pulse multiplier, the CG is the generator of shift pulses, and the desired sequence is removed from the output.

No. 126305-2 -

In order to perform mathematical operations, the transfer of codes from register to register in, the switch of the purpose of information transfer, is controlled.

FIG. 3 is a schematic of the device for the operation. It consists of registers a (ferrites, registers in (ferrites / 75-IZ) and a control register (on ferrites Yad-Yayu), which is designed to convert input signals into dual shift pulses for register a. - delay lines. From register a Codes corresponding to only odd shift pulses are transmitted to the register, since even numbers are prohibited by the prohibition winding of the Yay ferrite. The GI shifting pulse generator turns the code rewritten into a register into a pulse sequence. As a result, the sum of the output pulses is a square from the sum of the input pulses.

Nz FIG. 4 is a schematic of the device for performing the operation of Y. It contains the same functional blocks and the prohibition cell 3, through which the input pulses pass to the output of the device only when the register is cleared. The input pulses through the delay line Lc are passed to the Yad-Yai register and the output pulse recorded by the mother is doubled, which, through the F-F, affects the register o. From register a to a register, even codes are transmitted. As a result, pulses will be extracted from the input sequence according to the following law:

1 1 1 1 Г 1 1 1 1 I 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 (input) 1001000010000001000000001 (output) Therefore, the sum of the output pulses will be the square root of the sum of the input pulses.

Subject invention

Claims (3)

1. A method for performing mathematical operations on shift registers, characterized in that they use the representation of numbers in a ring code and the input value (argument), given as a sequence of pulses, is converted into a sequence of natural numbers, represented by a number of pulse code combinations, which, determined by the nature of the mathematical operation, are selected and again converted into the number of impunces representing the value of the output quantity (function). 2. A device for implementing the method according to claim 1, characterized in that, in order to obtain a quadratic dependence, two shift registers with logical feedback are used as the main functional unit, of which the first, operating in closed loop mode, is used to convert single input pulses into pulse combinations of natural numbers of numbers and transfer them to the second register with inverse logical feedback and open loop to which the pulse generator is connected, and the device input through t ety of two shift register cells, serving to control and simultaneously for doubling the input pulses, connected to the first register. 3. The device according to paragraphs. 1 and 2, in order to reproduce the dependence y x, the output of the open decoding register with logical feedback is connected to one of the inputs of the prohibition cell, the second input of which serves as the input of the device , and its output is connected to the input of a coding register block via a frequency doubler. f entrance  6YHOgOg FIG. 2 .j