SU1709315A1 - Service request controller - Google Patents

Abstract

The invention relates to computing and can be used in devices for interrupting programs and as part of a control system to provide individual and synchronous 2-group service for requests of various devices. The purpose of the invention is to expand the field of application of the device by providing asynchronous operation of external devices and improving speed by shortening the polling cycle. The device for managing the service of requests contains a polling unit, a control unit and N analysis units (N is the number of external devices). In turn, the polling unit contains three registers, a comparison element, a priority encoder and a decoder, the control unit contains a memory node, a multiplexer, a generator clock pulses, a group of elements And, three elements And, and a block of analysis contains an element of comparison and a register. The device can serve requests coming in both synchronous and asynchronous mode. In addition, the introduction of a mask mechanism eliminates the likelihood of forming a false request. 1 or ^ fc * fe The invention relates to computing technology and can be used in program interrupting devices and as part of a control system to provide individual and synchronous group service to requests of various devices. A device containing a control processor, a group of processors, and a shaper are known. , exchange nodes and two switches. In a known device, an analysis of the readiness of a group of processors of a computing system for interprocessor and external exchange is performed individually according to analysis that may trigger readiness of each processor. However, with a large number of processors, such an organization will lead to a large time-consuming control processor for analyzing the availability of processors. The device containing the control unit is unknown. The polling unit and the analysis and start units. The disadvantage of this device is impossible; | (working with groups dynamic configuration processors, in addition, it is impossible to service external

Description

devices asynchronously forming their requests.

The closest in technical essence to the present invention is a device comprising a polling unit, a control unit and analysis units.

A disadvantage of this device is the lack of servicing of external devices during the asynchronous formation of their requests, as well as the low speed due to the long polling cycle.

The purpose of the invention is to expand the functionality by providing asynchronous operation of external devices and improving speed by reducing the polling cycle. In addition, the reliability of the device is improved by providing protection against erroneous requests from external devices.

The goal is achieved by the fact that a known device containing a polling unit, including a clock generator, first, second, third elements And and N analysis units (N is the number of external devices), each of which contains a comparison element, and a group of information inputs and The synchronization input of the first register is a group of information inputs and a recording input of the device, respectively; the output of the clock pulse generator is connected to the first, second, And inputs; the first, second, and third inputs of each block analysis are inputs to the connection of external devices, and the second and third registers, the priority encoder, the decoder are entered into the polling unit, a multiplexer, a memory node, a NAND group of elements are entered into the control unit, the group number is in each analysis block, the group the outputs of the first register are connected to the group of information inputs of the second register, the group of reset inputs of which is connected to the group of outputs of the decoder, the synchronization input with the output of the first element I, and the group of outputs to the group of inputs of the priority encoder, the output of which is connected to the first input of the first comparison element, the input of the decoder and the information input of the third register, the synchronization input of which is connected to the output of the second element I, and the synchronization input of the decoder, and the output is the output of the device group number connected to the first ( the inputs of the comparison elements in each analysis unit and the first input of the multiplexer, the second input of which is the device address of the device mask, which controls the input of the device’s mode control input and is connected to the input of the mode memory node, an information input device is an input mask, the address input is connected

with the output of the multiplexer, and the outputs with the first inputs of the corresponding elements of the IS-NOT group, the outputs of which are connected to the inputs of the third element I, the output of which is the output of the indication of the identity of the request and connected to the second inverse input of the element I connected to the first inverse input of the second element I and to the output of the first comparison element, the second input of which is connected to the zero potential bus, the output of the comparison element in each analysis unit is connected to the second inputs of the corresponding zl AND NAND groups, generator input

clock pulses is the start-up input of the device, in each analysis block it is. The formation input, the synchronization and reset inputs of the group number register are the first, second, and third inputs for connecting external devices, respectively, and the output is connected to the second input of the comparison element in this same analysis unit.

In a known device, all external devices that form a group G must

to form the number of this group, arriving at the comparison element in each analysis block, simultaneously (synchronously). In practice, there are cases when external devices in a group must work asynchronously, for example, asynchronous operation of processors in computing systems like MIMD. In this case, the external devices in the group form the group numbers at different points in time (asynchronously). The prototype will not be able to service requests from such groups, since if a part of external devices forming a group will form a group number G and a ready signal, and the other part of external devices

the group of these signals will not have time to generate by the time they receive the group number G from the polling block, the device will form a false request by the group number O.

The proposed device provides asynchronous operation of external devices that form a group. This is achieved by introducing a mask mechanism into the prototype. During the survey, simultaneously with

the group number is given a mask. The mask M of the group contains units in the positions corresponding to the numbers of external devices that form the group G. A group query by mask (-Y group is calculated using the logic function

ig ".N -

Rl & (Mj Rj V Ml) & (R | Mj)

where N is the number of external devices serviced by the device;

RI - group request from the 1st group;

R - individual request J-ro external device;

MJ - J-th group mask size.

In addition, if an external device belonging to the group G generates an erroneous group number, then by comparing the set of external device requests with the mask M of the polled group, the device will not be able to generate a false group request Ri.

In the known device, the polling unit forms a sequence of numbers of polled groups from a continuous interval of 1, K, forming a polling cycle. If not all group numbers from the TJ interval are used. That part of the time from the cycle is spent idle, which leads to a loss of device performance. In the proposed device, the polling cycle is reduced, since the numbers of the polled groups can form any non-empty subset from interval 1, K, which allows to increase the device performance by eliminating idle cycle polls.

The drawing shows a structural diagram of the Proposed device.

The device for managing the service of requests contains a register of active groups 1. A generator of 2 tons of pulses, elements AND 3.4, a multiplexer 5, a buffer register 6. A decoder 7, a comparison element 8, a memory node 9, a priority encoder 1Q, a group elements AND-NOT 11, poll register 12, And element 13, analysis blocks 141-14m, while analysis block 141-14N contains comparison element 15, group number register 16, device information inputs 17, recording input 18, device startup input 19 , the input 20 of the mask address, the input 21 of the mode control, the input 22 of the device mask, the input dyes 23-25 of connecting external devices, output 26 of readiness indication of the request, output 27 of the device group number, the output register group 1 of the active groups is connected to the information input group of the buffer register 2, the reset input group of which is connected to the output group of the decoder 7, the sync input is with the output of the element 4, and a group of outputs with a group of inputs of the priority encoder 10. The output of which is connected to the first input of the comparison element 8, the input of the decoder 7 and the information input of the poll 12, the input synchronization Which is connected to the output of the AND 3 element and to the synchronization input of the decoder 7, and the output is index 5 by the group number of the device 27 and is connected to the first inputs of the comparison elements 15 in each analysis block 14i-14N and the first input of the multiplexer 5, whose second input is a device mask address input 20, a control input of mode control input 21 and connected to a mode node 9 of the memory, whose information input is a mask input 22, the address input of the memory node 9 is connected to

5 output multiplexer 5, - and the outputs - with the first inputs of the corresponding elements AND-NOT groups of elements AND-NOT 11, the outputs of which are connected to the inputs of the element And 13, the output of which is the output 26

0 of the readiness indication of the request and connected to the second inverse input of the element AND 3, the second input of the element 4 and connected to the first inverse input of the element 3 and the output of the comparison element 8, the second input

5 of which is connected to the zero potential bus, the output of the comparison element 15 in each analysis block 14i-14N is connected to the second inputs of the corresponding AND 11 elements of group 11, the input of the clock 2 is the device start input 19, in each analysis block 14i-14N the information input, the synchronization and reset inputs of the group number 16 are the first 23, the second 24, the third 25

5 inputs for connecting external devices, respectively, and the output is connected to the second input of the comparison element 15 in the same analysis block 141-14N.

The register of active groups 1 is for

0 storing the numbers of groups served by the device.

The multiplexer 5 commutes to its output either the register output 12 of the poll, or, the input 20 of the device mask address, depending on the value of the input 21 of the mode control ..

Buffer register 6 is used to store the numbers of groups that will be polled in the current polling cycle.

0 Decoder 7 is designed to remove the number of the served group from buffer register 6.

Comparison element 8 serves to detect the zeroed state of the buffer.

5 registers 6 to form a signal

reboot it.

Memory node 9 for storing group masks.

The priority encoder 10 is used to form from the unitary code stored in register b, the number of the most priority group.

The group element AND-NOT 11 and the element And 13 serve to form a group request.

The poll register 12 serves to store the number of the polled group.

Analysis unit 141-14N is used to generate an individual request for each external device on the group number being polled.

Comparison element 15 compares the group number supplied from polling register 12 with the group number stored in group number register 16.

In register 16, the group number records the group number that belongs to this external device.,

The device works as follows.

Before starting work, the register of active groups 1 via bus 17, using the recording signal received at input 18, lists the groups that participate in the survey.

A single potential is established at the input of mode 21 and multiplexer 5 connects to the address inputs of the memory node 9 the inputs 20 of the device mask address. At the addresses from input 20, node 9 is filled with masks of groups from input 22. The zero number is used to indicate free external devices, i.e. not belonging to any group in this survey cycle. Group numbers are entered into external devices either before the device starts operation (synchronous mode) or calculated by the external devices themselves during operation (asynchronous operation).

In the initial state, the element And 3 is closed by a signal of a logical unit, coming from the output of the comparison element 8. The same logical signal keeps the element 4 in the open state. After that, the device is switched to the mode of operation by the signal via the mode control code 21. The trigger signal on input 19 starts the generator of clock pulses, the first clock pulse of which, passing through AND 4. writes to the buffer register 6 the list of active groups stored in the register of active groups 1. The priority encoder 10 selects the number of the most priority group, which, entering the input element 8 of the comparison, the form (y | iret on its potential, the closing element And 4 and the opening element And 3. The next clock pulse, the passage through the element And 3

writes the group number selected by the priority encoder to the polling register 12. At the same time, the group number passes through the decoder 7 generates a signal to delete this group from the buffer register 6. From the polling register 12 the group number is fed to the inputs of comparison circuits 8 of each block 141- 14N analysis and through multiplexer 5 passes to the address

0 input node 9 memory. When a readiness signal is received at an arbitrary time for each external device at input 24 into register 16 from input 23, the number of the group to which this external device belongs is entered. The comparison element 15 in each analysis block 14i-14N compares the group number from the output of poll register 12 with the group number recorded in the group number register

0 16, and in case of their coincidence, a zero potential is given out to the second inputs of the corresponding AND-NOT elements of group 11. The first inputs of which receive mask discharges from memory node 9. The group of elements AND-NE 11 masks individual requests of external devices in accordance with the received mask. The signal of the logical unit appears at the output of those elements AND-NOT 11i-l IN.

0 in which the external device belongs to the polled group and issued an individual request or this external device does not belong to the polled group. Element And 13 collects

5 masked individual requests and vmadaet signal group readiness.

Two situations are possible: all external devices belonging to the group being surveyed, issued a signal of individual readiness; at least one external organization did not send a signal of individual readiness.

In the first case, the output 26 of the readiness indication of the request appears

5 logical unit, which, arriving at the inverse input of the element And 3. prohibits the passage of clock pulses to the synchronization inputs of the decoder 7 and poll register 12, the output of the group number 27 which is the number of the group that issued the group request. To resume polling, it is necessary to reset the contents of register 16 to input 25 in the analysis units of external devices belonging to this group.

5 In the second case, at the output 26, a potential of zero appears, which, arriving at the inverse input of the AND 3 element, enables the passage of a clock pulse, which writes to the polling register 12 the number of the next priority group and removes

this number is from the buffer register 8. Then the cycle continues until the output of the comparison element 8 fails to receive a single signal indicating that the buffer register 6 is reset. The next clock pulse passing through the 4 And 4 element overwrites the contents of register 1 of the active group numbers in buffer register b and the next polling cycle begins. In register 1 of active groups, a list of groups can be entered during the polling cycle. In this way, the group list can be dynamically changed during device operation.

All blocks used in the device for managing the service by request are standard elements of computing technology and can be implemented, for example, on integrated circuits 155; 530, 531 series.

Thus, the use of the polling unit inquiries, control units and N block analysis in the device allows the device to expand its functionality and speed. In addition, the flexibility and reliability of the device is improved.

The proposed device, unlike the known one, can serve requests from external devices operating in both the synchronous and asynchronous modes, which expands its functionality. In addition, the introduction of the mechanism of masks increases the reliability of the device. If an external device belonging to a group generates an erroneous group number, then two false requests are possible in a known device. The first false request will form the group to which this external device belongs. The second false request It may occur in the group in which the external device falls in connection with the change of its group number. In the proposed device, the formation of false requests is eliminated by comparing the set of requests from external devices with the mask of the polled group.

The speed of the device is increased by eliminating groups of external devices from the polling cycle that have already been processed. The decision to exclude the spent group from the polling cycle is taken by the system, which, during the operation of the device, can register in the register 1 a shortened list of active groups. Thus, in the proposed device, the polling time is reduced in proportion to the number of waste groups.

In addition, the ability to change the list of active groups during the operation of the device increases its flexibility. In a known device, in order to change the list of groups, it is necessary, first, to stop the operation of the device, secondly, to change both the coefficient of the counter recalculation in the polling block and the number of groups in external devices. In the proposed device, this

0 is only made by changing the contents of register 1 on the background of the polling process. Changes can be made within the maximum list, i.e. the list of groups for which masks are located in memory node 9.

Claims (1)

Claim device A request control unit comprising a polling unit, including a first register and a comparison unit, a control unit including a clock generator, first is a third AND block and N analysis blocks {N is the number of external devices) each of which contains an element of comparison, 5 wherein the group of information inputs and the synchronization input of the first register of the polling unit are a group of information inputs of the device and a recording input, respectively, the output of the clock generator 0 pulses of the control unit, connected to the first inputs of the first and second elements AND of the control unit, the first to third inputs of each analysis unit are inputs for connecting external devices, about that 5. to expand the field of application of the device by providing asynchronous operation of external devices and improving speed by reducing the cycle 0 polling, the second and third registers, the priority encoder, the decoder are entered into the polling unit, the multiplexer, the memory node, and the group of IE elements in each analysis block-number register are entered into the control unit 5 groups, the output group of the first register of the interrogation unit is connected to the group of information inputs of the second register of the interrogation unit, the reset input group of which is connected to the output group of the interrogator of the interrogation unit, the gate of which is connected to the output of the first I element of the control unit and the output group to the group the inputs of the priority encoder block survey, the output of which 5 is connected to the first input of the comparison unit of the oripoca block, the input of the descrambler of the polling unit and the information input of the third register of the polling unit whose sync input is connected to the output of the second And control unit and the sampling input of the interrogator of the interrogator, and the output is the output of the device group number and connected to the first inputs of the comparison elements in each analysis block and the first information input of the multiplexer of the control unit, the second information input of which is the address of the device mask, the control input - control input device mode and connected to the write-read input of the memory node of the control unit whose information input is the device mask input, the address input is connected to the multiplex output a control unit, and the outputs - the first inputs of AND-NO group control unit, the outputs of which are connected to the inputs of a third element and a control unit, whose output is a) a 1 output request indicating readiness coupled The second inverse of the second element And the control unit, the second input of the first element And the control unit is connected to the first inverse of the second element And the control unit and to the output Equal to the comparison element of the polling unit, the second input of which is connected to the zero potential bus of the device each analysis unit is connected to the second inputs of the corresponding elements of the NAND group of the control unit, the input of the clock generator of the control unit is the device start input, in each block analyzing data input, clock inputs and reset group number register are the first to third input connection of external devices, respectively, and an output coupled to a second input of comparing element analysis of the same block.