SU1698901A2 - Device for receive control signals - Google Patents

Abstract

The invention relates to communications and is intended for use in various types of radio devices, in particular, in television equipment for remote control. The purpose of the invention is to expand the functionality and increase the bandwidth of the device. The device contains a converter 1, an amplifier 2, a counter 3, a code identification block 4, a decoder 5, a first one-shot 6, a second one-shot 7, a detector 8, a key 9, an additional counter 10, output buses 11. m switching triggers 12, m memory triggers 13, m second outputs 14 of decoder 5, for each of which there is an additional one-shot 15, a delay 16, an additional memory trigger 17, an additional decoder 18. output bus 19, and a display unit 20. Entering the device for receiving control signals respectively VC The switch-on indication unit, additional mono-vibrators, delay elements, additional memory triggers and additional decoders greatly expands the functionality of the device, since it ensures the reception of control commands for equipment that have more than two stable states, and also provides an indication of the values functions. 1 il. cl

Description

The invention relates to the production of communications equipment and is intended for use in radio engineering devices for various purposes, in particular, television equipment for remote control.

A device for receiving control signals is known, comprising a primary transducer whose output is connected to the amplifier input, a detector whose output is connected to the first key input, a counter, a decoder, whose outputs are connected to the device outputs, a block

code identification, an additional counter and serially connected first and second one-oscillators, the output of the latter is connected to the installation input of the counter, the amplifier output is connected to the clock input of the counter and the first one-oscillator, the output of the second one-oscillator is connected to the control inputs of the first one-vibrator and the code identification block, to the clock input of the additional counter and the input of the detector, the output of the additional counter is connected to the installation input of the identification block

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Yes, and the control input of the decoder, the output of the counter is connected to the first information input of the code identification unit, the first output of which is connected to its second information input and the information input of the decoder, the second output is connected to the second input of the key, the output of which is connected to the installation input of the additional counter, the key output is connected to the first inputs of the switching triggers, the second outputs of the decoder are connected to the second inputs of the corresponding switching triggers, the outputs of which are connected to the inputs and the corresponding memory triggers.

However, such a device has insufficient functionality, since the number of states of functions controlled by the second outputs of the decoder is limited to two, there is no remotely controlled indication of the states of memory triggers, which significantly reduces the consumer qualities of the equipment. In addition, the number of commands received by one control channel corresponding to each of the second decoder outputs is limited to two, i.e. device bandwidth is limited.

The purpose of the invention is to expand the functionality and increase the bandwidth of the device.

This goal is achieved by the fact that in a device for receiving control signals containing a primary converter, the output of which is connected to the amplifier input, a detector, the output of which is connected to the first key input, a counter, a decoder, the outputs of which are connected to the device outputs, are connected in series first and second one-shot. the output of the latter is connected to the installation input of the counter, a code identification block, an additional counter, switching triggers and memory triggers, the amplifier output is connected to the clock inputs of the first one-oscillator, the output of the second one-oscillator is connected to the control inputs of the first one-oscillator and the code identification block, to the detector input and the clock input of an additional counter, the output of which is connected to the installation input of the code identification block and the control input of the decoder, the output of the counter is connected to the first The first information input of the code identification block, the first output of which is connected to its second information input and the information input of the decoder, the second output to the second input of the key, the output of which is connected to the installation

the additional counter input and the first inputs of the switching triggers, am of the second outputs of the decoder are connected to the second inputs of the corresponding switching triggers, the outputs of which are connected to the inputs of the corresponding memory triggers, an additional display unit is added, as well as an additional single vibrator for each of the m additional outputs of the decoder; delays, an additional decoder, and at least one additional memory trigger, with the output of the switching trigger being connected to the first input of the corresponding An additional one-shot, the first output of which is connected to the control input of the corresponding memory trigger through the delay element, the second output to the corresponding control input of the display unit, the memory trigger output is connected to the input of the corresponding additional memory trigger and the first input of the corresponding additional decoder, the outputs of which are connected to the corresponding information inputs of the display unit and the corresponding output buses, the corresponding second output decipher torus connected to a second input of the additional monostable.

The drawing shows a block diagram of an apparatus for receiving control signals.

The device contains a primary transducer 1, an amplifier 2, a counter 3, a code identification block 4, a decoder 5, a first single vibrator 6, a second single vibrator 7, a detector 8, a key 9, an additional counter 10, the first outputs of the decoder 5 are connected to output buses 11. The circuit contains there are also m switching triggers 12, m memory triggers 13, m second outputs 14 of the decoder 5, for each of which there is an additional 15T single-oscillator. delay element 16t, k additional memory 17mk flip-flops, additional 18t decoder with 19mf outputs. and the display unit 20.

The device works as follows.

In the initial state, the command signal to the input of the converter 1 is not received, as a result of which there is no signal at its output and the output of the amplifier 2, and the first 6 and second 7 single vibrators are in the initial state. Since there are no pulses at the output of the second one-shot 7, the signal at the output of the detector 8 is also absent, as a result of which the key 9 is in a passive state and the signal coming from its output to the setup input

The additional counter 10 and the second inputs of the flip-flops 12 determine their initial state. The signal from the output of the additional counter 10 acts on the control input of the decoder 5, prohibiting the latter from decrypting the code supplied to its information input from the first output of code identification block 4, as a result of which there are no signals on all outputs of the decoder 5.

The additional one-shot 15 are in steady state, and the signals O, coming from their second outputs to the control inputs of the display unit 20, block it, resulting in an indication of the state of the counters containing the memory 13m (13i) flip-flops and the additional 17mk flip-flops (17iic) memory missing.

Signals 1, coming from the first outputs of the additional one-shot 15, to the additional inputs of the corresponding memory trigger 13i-13m, block them.

When a command signal arrives in the form of a periodic sequence of pulse packets with a certain number of pulses in the packet, for each command, the output of the primary converter 1 appears a corresponding electrical signal. The first pulse packet is amplified and formed by amplifier 2, and then fed to the clock inputs of the first one-shot 6 and counter 3, which counts these pulses. The time of the first one-vibrator 6 in the unstable state is chosen longer than the packet with the maximum number of pulses, so that by the time the first one-vibrator 6 switches to the initial state and puts the second one-vibrator 7 in an unstable state, the pulses of this packet to the clock input stop counter 3. As a result, the code at the output of counter 3 ceases to change and, accordingly, the first information input of the code identification block 4 is connected to it. When the second one-vibrator 7 goes into an unstable state, the signal from its output acts on the control input of the code identification unit 4, as a result of which the first output of the latter records the code supplied to its first information input from the output of counter 3. The output signal of the second single-vibrator 7 acts on the control input of the first one-shot 6 so that the interfering signal cannot put the first one-shot 6 into an unstable state and thereby disrupt the synchronization of the operation of the device. The signal from the output of the second odometer 7 acts on the detector 8,

as a result, at the output of detector 8, a signal appears, which arrives at the first input of the key 9 and transforms the latter into an active state, in which a signal is reset from the installation input of the additional counter 10 and the first inputs of the switching flip-flops 12. When the second one-shot 7 returns to its original state

The 0 signal from its output acts on the setup input of the counter 3 and sets the latter to the initial state.

Upon receipt of the second packet of pulses on the primary converter 1

5, the device operates similarly to the previous clock cycle, except that the signal received from the output of the second one-oscillator 7 to the clock input of the counter 10 changes its state. At the same time

0 in the case of the identity of the codes at the information inputs of the code identification block 4 (i.e. in the case of the same number of pulses received at the clock input of counter 3 during this and previous

5 cycles) the signal at its second output does not change, as a result of which the state of key 9 does not change.

Upon receipt of subsequent pulse packets to the primary converter 1

0 signal command into an electrical signal device operates similarly to the second clock cycle until then. until the code characterizing the state of the counter 10 and increasing by one for each clock cycle, does not reach the maximum value. In this case, the signal from the output of the counter 10 is fed to the control input of the decoder 5, permitting the decryption of the code arriving at its information input from the first output of block 4

0 identification code, and the corresponding output of the decoder 5, for example, connected With the output bus 11, a signal appears.

When the next package arrives

5 pulses to the primary converter 1, the device operates similarly to the previous clock cycle, except that the additional counter 10 overflows, the signal from its output, which arrives at the control input of the decoder 5. Prohibits the decryption of the code arriving at its input (signal at the output bus 11t disappears), as well as the signal from the output of the counter 10, arriving at the installation

The 5 input of the code identification block 4, prepares it for fixing the code, which can arrive at its first information input from the output of the counter 3 in the next clock cycle. If the given command continues to arrive, then for every q clock ticks on the output

bus 111, a signal appears (where q is the conversion factor for counter 10).

When the command is terminated, the signals at the outputs of the primary converter 1, amplifier 2, first b and second 7 single vibrators and detector 8 disappear, the key 9 goes into the passive state and returns to the initial state an additional counter 10, which, acting on the decoder control input 5, blocks it, as a result of which there are no signals at the outputs of the decoder 5.

If the primary transducer 1 receives a command signal with a different number of pulses in the packet, the device operates similarly to the case of a previously issued command, except that the signal appears on another output of the decoder 5, for example, connected to the output bus 11 p. when the signal arrives at the primary converter during the first clock cycle, determined by the time of unstable states of the first 6 and second 7 single vibrators, the device operates similarly to the case of the first clock when the command signal arrives dy However, in the next clock cycle, due to the random nature of the interference signal, the counter 3 is set to a state different from its state in the previous clock cycle. As a result, non-identical codes appear at the information inputs of code identification block 4, as a result of which a signal appears at the second output of code identification block 4, which, acting through the key 9 on the installation input of the additional counter 10, transfers it to the initial state. The code identification block simultaneously with the appearance of a signal at its second output enters a state of readiness for latching — a code that can arrive at its first information input from the output of counter 3 in the next clock cycle. With continued interference, the device operates as in the case of two. previous clock cycles, as a result of which counter 10 cannot receive a state in which a signal is received from its output to the control input of the decoder 5, enabling the decoding of the code received to the information input of the decoder 5. In this case, the signals on the outputs of the decoder 5 are missing, t . The device is not sensitive to interference.

When a command signal is received with the number of pulses in the packet corresponding to the output 14t of the decoder 5, the device operates similarly to the case when a packet arrived with the number of pulses corresponding to the output 111 of the decoder 5, except that the pulses outputted at the output of the decoder 14t 5, arriving at the second input of the switching trigger 12t, set it to a state of 1 m. In this case, the signal from the output of the trigger 12t goes to the clock input of the trigger 13t of the memory and the first input of the additional one-shot 15t. The trigger 13t of memory does not change its state, since it is blocked at the control input. Additional one-shot 15t trans. dies in an unstable state during ti. The signal O from the first output of an additional one-shot 15 t through time t2. determined by the delay element 16t, arrives at the control input of the memory trigger 13t and releases it. The signal 1 from the second output of the additional one-shot 15 t is fed to the control input of the display unit 20, as a result of which it begins to indicate the state of the counter containing the trigger 13 of the memory

5 and an additional trigger 17mk of memory (e.g., the state in which signal 1 is at the output 19t1 of the additional decoder 18t). When the command signal arrives at the input of the primary converter 1, the impulses at the output 14t of the decoder 5 disappear, the key 9 goes into the passive state and the signal from its output, affects the first input of the trigger 12t, sets the last one to

5, the initial state of O. In this state, the trigger of memory 13t and additional one-shot 15t does not change.

If, as a result of analysis by the operator of the information display unit 20 displayed by the madium, the counter status (triggers 13t, 17mk) is not required, then after ti expires after the launch of the additional 15t one-shot, the latter goes into a steady state. With

5 this is the signal G from the first output of an additional one-shot 15 t through time t2. determined by the delay element 16t, arrives at the control input of the memory trigger 13t and blocks it.

0 The signal O from the second output of the additional one-shot 15 t is fed to the control input of the display unit 20, as a result of which the indication of the counter status (triggers 13m. 17mk) is turned off.

5 If, as a result of the analysis by the operator of the information displayed by the display unit 20, it is necessary to change the state of the counter (triggers 13m, 17mk). then during the time when the additional one-shot 15t is in an unstable state, the previous command must be re-issued. In this case, the device operates as in the previous case, except that the signal from the output of the decoder 14t to the second input of the additional one-vibrator recovers its unstable state, and the signal from the output of the switching switch 12t to the input of the trigger 13t memory changes There is a binary code characterizing the state of the binary counter (triggers 13m, 17mk), by 1. In this case, the signal 1 appears at the output 19mi of the additional decoder 18t, and the display unit 20 highlights the new state of the counter (trigger s 13m, 17mk). Thus, to turn on the counter (triggers 13t, 17mk), a command corresponding to the output 14t of the decoder 5 (as a result, the indicated counter status is turned on) is sent to a certain state, and then analyzing the information displayed by the display unit 20, sequentially feed the same command before turning on the counter to the desired state. At the same time, the received signal is fixed at the appropriate one of the outputs 19 of the additional decoder Sch-c, and after the time ti has elapsed thereafter, the display unit 20 turns off the indication of the counter status (triggers 13m, 17mk). When a command signal with the number of pulses corresponding to the output 14i of the decoder 5 is received, the device operates as if there were packets with the number of pulses corresponding to the output 14t of the decoder 5, except that the indication of the counter status is turned on (triggers 13i, 17ik) and fixed the received signal at one of the outputs 19 of the additional decoder 18i.

Thus, introducing into the device for receiving control signals, respectively, the indicating unit, additional one-shot, delay elements, additional memory triggers, additional decoders, significantly expands its functionality, since it ensures the reception of control commands for such functions that have two stable states, such as color systems, frequency ranges, off timer, program switching, and however, an indication of the values of the indicated functions is provided. At the same time

the bandwidth of the device channels is expanded, since 1 + 2 + 1 control commands can be transmitted through one control channel corresponding to each of the m second decoder outputs, where

K is the number of additional memory triggers in one control channel.

Claims (1)

Claims Device for receiving control signals according to aut. St. No. 903933, characterized in that, in order to expand the functionality and increase the capacity of the channels of the device, an indication unit is inserted into it, for each from m outputs of the decoder - an additional one-shot, a delay element, an additional decoder, an additional memory trigger, the output of a switching trigger is connected to the first input of the corresponding additional one-vibration, the second input of which is connected to the corresponding output of the decoder, the first output of the additional one-vibration through the delay element is connected to the control the input of the corresponding memory trigger, the second output of the additional one-shot is connected to the corresponding control input of the block a display, a trigger output connected to the memory input of the respective additional trigger memory and the first input of the additional decoder, the second input of which is connected to the outlet pre-. memory trigger, outputs The additional decoder is connected to the corresponding information inputs of the display unit and are the corresponding outputs of the device.