SU1688461A1 - Instrument to meter the crt sweep nonlinearity - Google Patents

Abstract

The invention relates to a television technique. The purpose of the invention is to reduce the time and increase the accuracy of measurement. The device i contains a video beeper 1, an electron-beam pipe (5-ku 2, a block of photodetectors, an element

Description

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OR 6, demultiplexer 7, control unit 10, K-counters 11-11k, multiplexer 12, four registers 13-16, calculation unit 21, and digital indicator 28. The purpose of the invention is achieved by automatically measuring the nonlinearity coefficient using input blocks 6 12- 27. 2 Il.

The invention relates to electronic equipment and can be used in the production, control, repair of CRTs and equipment with their use - televisions, displays, radar indicators, photo registration devices, information input into a computer and

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The purpose of the invention. - reduction of time and improvement of measurement accuracy.

FIG. 1 shows a structural electrical circuit of a device for measuring the non-linearity of a CRT scanner in FIG. 2 - timing charts of the device.

A device for measuring the non-linearity of a CRT scanner contains a video amplifier (WU) 1, a CRT 2, a deflecting system (OS) 3 CRTs, a unit 4 photodetectors, (K + 1) photoreceivers element OR 6, a demultiplexer (DM / 1

7, scanner unit 8, clock pulse generator (GTI) 9, control unit 10, K-counters 11-11 k, multiplexer 12, first, second, third and fourth registers 13-16, first and second digital comparators 17 and 18, maximum value register 19, minimum value register 20, calculation block 21 containing a subtractor 22, adder 23, divisor 2

and a shift register 25, as well as a memory register 26, a decoder 27, and a digital indicator 28.

The device works as follows. i

By dividing by the required number of times

the clock pulses generated by the GTI 9 are converted using block 10 to sweep synchronization pulses, which are fed to the block

8, creating, using OS 3, a scan line 2 on a CRT screen. The sweep signal is shown in FIG. 26

By further dividing the frequency, block 10 generates pulses of the beam illumination in such a way that from a continuous sequence

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There are only a few lines that are highlighted: the time interval between the backlight pulses is used to process the results, and the backlight pulse period corresponds to the full cycle of the device. These pulses amplified with the aid of WU 1 arrive at the cathode modulator assembly of a CRT (Fig. 23. The radiation from the scanning line successively falls on (K + 1) linearly spaced FP 5 at the outputs of which electrical pulses Converted using the element OR 6, these pulses (Fig. 2c) control the operation of DM 7. In the presence of non-linearity of the sweep, as shown in Fig. 26, the time intervals between the pulses from the AF 5 K + 1 will not be equal. nonlinearity ft defines em known expression

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Consequently, the task is reduced to fixing the values of м and Ј mmm (or their corresponding values) and the subsequent calculation of AND using this formula. These operations are performed as follows.

The DM 7, which is a switchgear, by the incoming pulse from the element OR 6 generates counting resolution pulses, arriving at the counter 11 k (Fig. 2c-g). Clock counts are continuously applied to the counting inputs of these counters (Fig. 2h). However, taking into account the resolution pulses, the counters only record the number of pulses corresponding to the time intervals between pulses from neighboring photodetectors (Fig. 2i-1). In order to fix the indicated numbers from the (K + 1) photodetector, it is obviously necessary to apply K counters.

Further, according to the control signal of the multiplexer, coming from block 10

to the resolution of multiplexer 12, the code recorded by counter II is transferred to registers 13 and 15a. At the beginning of the cycle, the signal coming from block 10 to the reset inputs of registers 14 and 16, these registers are set: first to the state 000 ... O, the second state is 111 ... 1. Consequently, in register 13 there will be a number that will certainly have a larger number in register 14, and in register 1 $ there will be a number which will certainly be less than that in register 16. Comparing the numbers on the next command from block 10, comparator 17 generates a code rewriting enable signal from register 13 to register 19 is the maximum value, and the comparator 18 generates a resolution signal for rewriting the code from register 15 to the minimum value register 20. These codes are also overwritten in registers 14 and 16, respectively, instead of the previously established source codes.

With the arrival of the next pulse of the control signal of the multiplexer 12, the counter code 11 corresponding to the next time interval is written to the registers 13 and 15. The rest of the procedure is repeated. However, perezo and counting inputs of K-counters, the code from the register 13 to register 19 is cut only if the number in register 13 is greater than the number in register 14, i.e. corresponding to the previous time interval, similarly, the code is rewritten from register 15 to register 20 only if the number in register 15 is less than the number in register 16, i.e. corresponding to the previous time interval.

As a result of continuing this procedure until reading the number from the last counter, 11 K, i.e. within the cycle of operation of the device, in registers 19 and 20 are fixed numbers corresponding to the greatest and. the smallest of the analyzed 35

the decisive input of which is connected to the corresponding output of the demultiplexer, as well as a block of linearly located (K + 1) photodetectors installed in front of the CRT screen, characterized in that, in order to reduce the time and increase the measurement accuracy, the OR element is introduced (K + 1) the inputs of which are connected to the corresponding 4Q photodetector, and the output is connected to the input of the demultiplexer, the multiplexer, K information inputs and the control input of which are connected respectively to the outputs K of the counters and the third output of the control unit, the first Torah, third and fourth registers, the first and second digital comparators, the first and second signal inputs of which are connected

terrible time, i.e. Values, respectively, - 50, respectively, with the outputs of the first and corresponding and

- “This is because the outputs of the registers 1U and 20 are also connected to block 21 and adder 23, then the following commands from block 10 will be used to perform subtraction and summation, and then using the divider 24 and further by doubling the register 25, which corresponds to the above formula.

the second registers and the third and fourth registers, as well as the maximum value register, the minimum value register and its sequentially connected calculation block, memory register, decoder and digital indicator, while the outputs of the first and third registers are also connected to signal outputs, respectively

The result of these arithmetic operations is recorded in register 26 and c. | using the decoder 27 is displayed on the scoreboard of the digital indicator 28 as a decimal number. The frequency of changing the displayed number is determined by the frequency of arrival of the read pulse to the input of the register 26 from

block 10. At the end of the cycle from block 10, a signal is removed, which resets the codes recorded in the counters 11-11 to the codes, and also sets register 14 to the state 000 ... O, register 16 to

Claims (1)

5 state 111 ... 1, and, thereby, prepares the device for a new cycle, the claims A device for measuring the non-linearity of the sweep of a cathode ray tube containing a video amplifier and a scanner whose inputs are connected respectively to the first and second outputs of the control unit, and the outputs 5 are connected respectively to the modulator and cathode ray tube deflection system clock generator, the output of which is connected to the input of the control unit five the decisive input of which is connected to the corresponding output of the demultiplexer, as well as a block of linearly located (K + 1) photodetectors installed in front of the CRT screen, characterized in that, in order to reduce the time and increase the measurement accuracy, the OR element is introduced (K + 1) the inputs of which are connected to the corresponding photodetector, and the output is connected to the input of the demultiplexer, the multiplexer, K information inputs and the control input of which are connected respectively to the outputs K of the counters and the third output of the control unit, the first Torah, third and fourth registers, the first and second digital comparators, the first and second signal inputs of which are connected respectively with the outputs of the first and the second registers and the third and fourth registers, as well as the maximum value register, minimum value register and serially connected calculation unit, memory register, decoder and digital indicator, while the outputs of the first and third registers are also connected to signal outputs, respectively the maximum value register and the minimum value register, the resolution inputs of which are connected respectively to the outputs of the first and second digital comparators, the resolution inputs of which are connected to the fourth output of the control unit; the fifth, sixth, seventh, eighth and ninth outputs of which are connected respectively to the first, second and the third control inputs of the computation unit, the read input of the memory register, and but Editor I. Casard ® and r. 2. Compiled by I.Gratsianska Tehred A. Kravchuk the combined setup inputs of the second and fourth registers and the K-counter reset inputs, the signal inputs of the first and third registers are connected to the multiplexer output, the signal input of the second register is connected to the output of the maximum value register and the first signal input of the calculator, the second signal input of which is connected to the signal input the fourth register and the output of the minimum register. Proofreader N. Revska