SU1645981A1 - Object state signalling device - Google Patents

Abstract

The invention relates to a signaling technique and can be used to automatically monitor object states. The aim of the invention is to improve the speed of the device. The purpose of the invention is achieved in that a device comprising a pulse generator 1, a control unit 2, a memory block 3, an information display unit 7, an AND element 8, a starting node 9, an OR-NOT element 10, an information input 11 and a control input 12, - multiplexer 4, switch 5 and counter 6 are entered. In memory block 3, information is recorded about: compliance or non-compliance of object parameters with specified requirements. Pulse generator 1, multiplexer 4, switch 5 and counter 6 provide a high polling rate of the outputs of block 3 memory appropriate normal state of the object parameters, and a low rate of interrogation unit memory 3 outputs corresponding parameters released within acceptable tolerances. In the first case, the information on the display of the information display unit 7 cannot be perceived by the operator, and in the second case it is reliably recorded. In the case of a normal state of the object, the symbol O is displayed on the board. 2 Il. S (l

Description

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The invention relates to signaling and can be used to automatically monitor object states.

The purpose of the invention is to increase the speed of the device "

Fig about 1 presents a functional diagram of the device; Fig 2 is a diagram of the control unit.

The device contains 1 pulse generator, control unit 2, memory block 3, multiplexer, 4, switch 5,. the counter 6, the information display unit 7, the AND element 8, the starting node 9 and the OR element 10 are NOT. The information input of the control unit 2 is the information input 11 of the device, and the second input of the AND element 8 is the control input 12 of the device.

The control unit 2 may contain a counter 13, a decoder 14, a trigger 15 and decoders 16-16 ° °. The combined inputs of the installation in

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13 and the trigger 15 are the installation input of the block, the output of the trigger 15 is the output of the mode of the block, the inputs of the decoders are the information inputs of the block, and their outputs are the information outputs of the control 2 “Clock input of the counter 13 is the synchronization input of the block. The memory block 3 can be executed on the triggers. The starting node 9 contains the OR element and a button connected to the first input of the OR element, the second input of which is the input of the starting node, and the output of the OR element - its output.

The device works as follows.

When the button of the starting node 9 is pressed by its output signal, all the triggers of the memory block 3 and the trigger 15 of the block are reset to the initial state.

2 control. At the output of the control unit 2, a signal O is generated, prohibiting the generator 1 for a certain time. The same signal suppresses the display of the display unit 7, which indicates that the device controls the information monitoring cycle, the duration of which is set by the counter 13 and the decoder 14 "When any output controlled parameters for permissible limits from the corresponding outputs of block 2 control to block

3 signals arrive and memorize signals 1. After the specified

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of the control unit 2 mode, a signal 1 is generated, a pulse generator 1 is turned on, a low frequency signal second (for example, 1 Hz) is fed to the input of the element 8 and the first input of the switch 5, and the high frequency signal (for example, 100 kHz) to the second input of the switch 5. In addition, the signal from the output of the control unit 2 turns on the display board of the information display unit 7, in this case, if there is no control over at least one of the outputs of the block 3 of the signal 1 memory, the output of the OR-NOT 10 element generates a signal 1, which sets the counter 6 to the state O. This code arrives on the scoreboard of the information display block 7, certificate of At the same time, if the control input 12 contains the signal O, the pulses of the generator 1 of the pulses through the element 8 do not pass. In this mode, the operator can make sure at any time that the control cycle passed without deviations. Signal 1 is present at control input 12, then O is displayed on the board during the low-frequency period of the pulse generator 1. After that, the first impulse of the specified frequency of the generator 1 impulses goes through the AND 8 element to the starting node 9, and from the last output to the installation input of control unit 2 and the installation input into O of memory block 3. After this, the monitoring process is resumed. Automatic resumption of each monitoring cycle with indication of the operating state of the monitored object continues until the signal 1 is sent to the control input 12 of the device. This mode is necessary during long-term testing of the monitored object. If at any moment the control unit 2 detects the deviation of the monitored quantity along any circuit, then this is fixed in memory block 3 and a signal appears at its corresponding output. The output of the OR-NOT element 10 in this case has the signal O that prohibits the device from re-entering the control mode from the pulses of the 1-pulse generator and allowing the counter to work 6 "Because the first information input

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multiplexer 4 is connected to the zero potential potential, and its address inputs from counter 6, which is in state O, receive a code corresponding to the first information input of multiplexer 4, then the control input to the control input 5 comes from signal to the counting input of the counter 6 through the switch 5 receives a high frequency signal. When a signal O appears at the output of the element OR NOT 10, the counter 6 goes into the counting mode. Consequently, the address code fed to the multiplexer 4 begins to change with a high frequency. As soon as the code corresponding to the number of the monitored parameter, which has changed unacceptably and recorded in memory block 3, appears at the address input of multiplexer 4, the signal 1 through the multiplexer 4 enters the control input of the switch 5 at the same time through the latter to the counting input of the counter 6, the first output of the pulse generator 1 is connected. During the period of the low frequency signal, the code of the parameter number outside the permissible limits is displayed on the display of the information display unit 7. When the first low-frequency pulse arrives at the counting input of counter 6, the code at its output changes and information goes to the output of multiplexer 4 from the next output of memory block 3. If this information corresponds to 1, then the code of the number of the next parameter is displayed on the scoreboard of the information display unit 7 during the low frequency signal period. If this information corresponds to O, then the switch 5 to the counting input of the counter 6 delivers high-frequency pulses. The search of codes is performed with a high frequency until the current code coincides with the code of the parameter, which went beyond the permissible norms. At the same time, the device again switches to a low frequency. Thus, on the display of the information display unit 7, the codes of the parameter numbers that went beyond the permissible limits are displayed in

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taken with such frequency that the operator does not fix them.

Claims (1)

Since during normal object reading information from the outputs of memory block 3 was carried out with a high frequency, the device was almost constantly in control mode in the mode with automatic restart, since the time interval between control cycles is insignificant. The decree leads to an increase in the speed of the device. Formula invented A device for signaling an object's object, containing a starting node, the output of which is connected to the input of the installation in O of the memory unit and the installation input of the control unit, the mode of which is connected to the secondary inputs of the formation display unit and the pulse generator, the fifth output of which is connected to The first input of the element is AND, the second input of which is the control input of the device, the output of the element AND is connected by the input of the starting node, the synchronization input of the control unit is the device synchronization input, the information inputs of the control unit With the information inputs of the device, the information outputs of the counter unit are connected to the information inputs of the block, the memory whose outputs are connected to the inputs of the OR-NOT element, the stroke of which is connected to the third input of the AND element, characterized by the fact that, in order to increase the speed of the device, A switch, a counter and a multiplexer are entered into it, the first information input of which is connected to the zero potential bus, and the subsequent information inputs to the outputs of the memory block, the multiplexer output is connected to the switching input of the switch, One is connected to the counter input of the counter, the outputs of which are connected to the address inputs of the multiplexer and information inputs of the information reflection unit, the first and second outputs of the pulse generator are connected to the first and second, and the passage of time sufficient for the fixed, ,, lormation inputs of the switch, by their operator. The number codes of the remaining parameters of the output element OR is NOT connected to the home of the installation in the About counter. 5981 0 five 0 five 0 five 0 five 0 taken with such frequency that the operator does not fix them. Since during normal object reading information from the outputs of memory block 3 is performed with a high frequency, in the automatic restart mode the device is almost constantly in control mode, since the time intervals between control cycles have a small duration. This circumstance causes an increase in the speed of the device. Invention Formula A device for signaling the state of an object, containing a starting node, the output of which is connected to the installation input of the memory unit O and the installation input of the monitoring unit whose mode output is connected to the enabling inputs of the information display unit and the pulse generator, the first output of which is connected to the first the input of the element And, the second input of which is the control input of the device, the output of the element And is connected to the input of the starting node, the synchronization input of the control unit is the input of the synchronization of the device, information The control module inputs are informational inputs of the device, the information outputs of the control unit are connected to the informational inputs of the unit, the memory, the outputs of which are connected to the inputs of the OR-NOT element, the output of which is connected to the third input of the AND element, characterized in that device speed, a switch, a counter and a multiplexer are entered into it, the first information input of which is connected to the zero potential bus, and the subsequent information inputs to the outputs of the memory block, the multiplex output Pa is connected to the control input of the switch, the output of which is connected to the counter input of the counter, the outputs of which are connected to the address inputs of the multiplexer and information inputs of the information display unit, the first and second outputs of the pulse generator are connected respectively to the first and second outputs of the element OR NOT connected to the input installation in About counter. 16.1 L-A FIG. Z 16.n