SU1636792A1 - Phase shift meter - Google Patents

Abstract

The invention relates to radio electronics and can be used in measurement technology, in particular, in motion measurement systems with multi-turn modulation of the phase of periodic signals. The purpose of the invention is to increase the reliability of the device, achieved by the fact that the device 12 additionally introduces two numbers 12, blocks 13 and 14, compare two numbers, delay elements 15 and 16, and elements 17 and 18. In addition, the device contains a generator 1 clock pulses, shaper 2 reference signals, shaper 3 phase-modulated measuring signals, containing phase shifter 4, filter 5 and comparator 6, trigger 7, element 8, counter 9, register 10 and reversible counter 11. 1 Il.

Description

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The invention relates to the field of radio electronics and can be used in measurement technology, in particular, in motion measurement systems with multi-turn modulation of the phase of periodic signals.

The purpose of the invention is to increase the reliability of the device.

The drawing shows a block diagram of the device.

The device comprises a clock pulse generator 1, a driver of 2 reference signals, a driver of 3 phase-modulated measuring signals, including a series-connected phase shifter 4, a filter 5 and a comparator 6. trigger 7, whose inputs are connected to the outputs of the imager 2 and comparator 6, element 8, the inputs of which are connected to the outputs of the generator 1 and the trigger 7, the counter 9, the input of which is connected to the output of the element And 8, the register 10, the information input of which is connected to the output of the counter 9, the input of the synchronization recording p the horn 10 and the reset input of the counter 9 are connected with the output of the driver 2, the reversible counter 11, the setting unit 12 two numbers, two blocks 13 and 14 of the number comparison, the inputs of which are connected to the outputs of the register 10 and the setting unit 12, delay elements 15 and 16, and - cops And 17 and 18. The output of block 13 is connected to the first input of the element And 17 through the delay element 15 and to the second input of the element And 18 directly. The output of block 14 is connected to the first input of the element And 18 through the element 16 of the delay and to the second input of the element And 17 directly. The output element And 17 is connected to the summing, and the output element And 18 - to the subtractive inputs of the counter 11.

The generator 1 generates high-frequency quantizing pulses with the help of the imaging unit 2, the reference signals with the frequency fo are generated.

The signals with frequency fx are formed by comparator 6 at the moment of increasing zero transition of the first harmonic of the signal from the phase shifter. The signal can be shifted in time relative to the signals by the frequency fo according to the change in position of the phase shifter 4.

The set of phase values tfi of the signals fx relative to the signals fo is measured using trigger 7, element 8, counter 9 and register 10 by counting the clock signals over a period of time.

The numerical value fi is entered into register 10 on the leading edge of the signal with the frequency fo at the end of the counting, and counter 9

reset to zero on the falling edge of the fo frequency signal.

The setting unit 12 contains numbers, for example, 0.3 and 0.7, which limit the subsets of large phase values p 0.7 and small phase values p-t 0.3 formed by the unit 12.

As the phase increases, the value of p changes from 0.5 to 0.8; 0.1; 0.5, etc., these numbers being rewritten to register 10 by the signal fo at the end of each period. As a result, the output of block 13, the signal delayed by the delay element 15, will take the value of a logical unit (p 0.7). With further phase change, the signal at the output of block 13 will take the value of logical zero, and the signal at the output of block 14 will take the value of logical unit. At the moment of changing fa 0.7 by (fi 0.3, when the phase value is compared in two adjacent periods, the output of the element 17 will generate a +1 pulse, which is counted by counter 11. The codes at the outputs of register 10 and counter 11 are older and minor bits are formed with a minimum delay.

With the reverse phase change (decrease), the phase change sequence is 0.5; 0.2; 0.8 and at the output of the element And 18 a signal -1 is formed.

If a phase change occurs without going through 0 (2L), for example, /, 0.2-0.5-0.8, or, conversely, signals of ± 1 are not generated.

Claims (1)

Claims An apparatus for measuring a phase shift, comprising a trigger phase meter, the output of which is the first output of the device and a reversible counter, the output of which is the second output of the device, characterized in that, in order to improve the reliability of the device, two numbers are added to it, two units for comparing two numbers, two delay elements and two elements, And, the output of the trigger phase meter is connected to the first inputs of the units comparing two numbers, the second inputs of which are connected to the outputs Atomic two numbers, the output of the first block compare two numbers through the first delay element connected to the first input element And the output of which is connected to the summing input of the reversible counter, the subtracting input of which is connected to the output of the second element And the first input of which through the second delay element connected to the output the second block compare two numbers, the input is first evil The delay element is combined with the second delay input, combined with the second input the house of the second element I, and the input of the second element of the first element I.