SU1628061A1 - Functional converter - Google Patents

Abstract

The invention relates to analog computing and can be used as a non-linear unit in analog computing machines or control systems. The aim of the invention is to expand the class of reproducible functions. The functional converter contains the first 1, the second 2 and the third 3 adders, the first 4, the second 5 and the third 6 multipliers, information input 7, first output 8, second output 9, and bus 10 of the reference voltage. Achieving this goal is ensured by new connections between the constituent elements of the device. 1 il.

Description

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The invention relates to analog computing and can be used as a non-linear unit in analog computing machines or control systems as a device for linearizing sensors or a device for preliminary inverse measurement information.

The aim of the invention is to expand the class of reproducible functions.

The drawing shows a structural diagram of a functional converter.

The functional converter contains first 1, second 2 and third 3 adders, first 4, second 5 and third 6 multipliers, information input 7, first output 8 and second output 9, and bus 10 of the reference voltage,

Functional Converter works as follows.

Let the second input of the adder 2 from the input 7 receives the signal Ux. The signals Uff and from the outputs of multipliers 5 and 4, respectively, come to its first and third inputs, and the signal “from its output

The first and third inputs of adder 2 are inverting, and the second and fourth are non-inverting, K Ј 2. transmitting adder 2 through the second input is equal to 1. At the output of adder 2, a signal U is formed, defined by

U2.UX- K2, U5 - K2, b4 + K24U1, (J)

where K i and the transfer coefficients of adder 2 through the first, third, and fourth inputs, respectively.

The signal U is fed to the inputs of multiplier 4, to output 8, to the second input of multiplier 5, to the fourth input of summator 1 and to the third input of adder

At the output of the multiplier 4, a signal of 1C is formed, equal to the product of the signals at its inputs:

- ,, 2

2

(2)

which is fed to the first input of multiplier 5, to the third inputs the sum of TORs 2 and 1 and to the second input is the sum of Pa 3.

At the output of the multiplier 5, a signal U.- is generated, equal to the product of the signals at its inputs:

U5- V4 U2 O)

which arrives at the first input of the adder 2 and to the second input of the adder 1,

By solving equations (1), (2) and (3) together, you can write

UЈ tfX-K4lU -K2gU + K. (4)

If you set the transfer coefficients on the inputs of the adder 2 equal to:

K 2.4 - 2 1;

to 23 Oh then we get

Ut 4lЈ. (5)

Esti set the transfer coefficients for the inputs of the adder 2 equal

to 24 kg s 1;

to

and

 about,

then we get

U,

l1i „.

(6)

If you set the transfer coefficients on the inputs of the adder 2 equal

P

about

d

Q

five

five

TO

21

 k24 k2E oh

U 2. Ux; U4 P5

u5 uj.

then in accordance with equations (1), (2) and (3) we obtain:

(7) (8) (9)

The first inputs of the adders I and 3 receive the reference voltage UQ from the bus 10. In the adder 3 all the inputs are non-inverting. At the output of the adder 3, a signal U is formed, defined by the equality

 and, к31 и0 + кд2и4 + к, 3 и2,

where К51 К32 Кзз - transfer coefficients of the adder 3 on the first second and third inputs, respectively.

Taking into account equations (7), (8) and (9), we can write down:

U3 b0 + b, and l + bgUj, (10) where bQ, bc, bn are constant coefficients determined by the equalities:

B0 k51io

l, k33;

B4 k32

The signal 11 from the output of the adder 3 is fed to the second input of the multiplier 6.

The fifth input of the adder 1 receives the signal U from its output, and the sixth, the signal Ug. from the output of the multiplier 6, In the adder 1 sixth input

is inverting, the remaining inputs are non-inverting. The transmission coefficients for the fifth and sixth inputs of the adder are set to 1. The signal U at the output of the adder 1 is defined as

and

Kp io + klg VKi3. g + and-g

(H)

where - transfer coefficient adder1 at the i-th inlet

(i - 1,4).

Solving equations (7), (8), (9), and (11) together, we get

and,

a0 + alux + 4ux

where a o K 4, U0; but "

3

K (4 yg

+ a31x

(12)

TO

TO

13

12c output

but ,

The signal And, from the output of the hummator, is fed to the first input of the multiplier 6 and to the output 9 of the converter. At the output of the multiplier 6, a signal U is formed, which is equal to the product CHI of the pitch at its inputs:

U

6 UG U3 (13)

Solving equations (10), (12) (13) together.

U

we get: ao + a y + aiUx + a5Ux bo + cid + b ou

Thus, at the output of the adder 1 and at the output 9 of the converter, as in the prototype, a function of the input signal is formed, which is a rational fraction of the third degree. This allows the on-off converter to form all non-linear dependencies of the input signal, which the prototype forms, and to provide an approximation with an accuracy not worse than the prototype.

However, as can be seen from the equations. (6) and (5), in addition to this, the converter allows to obtain

628061 °

Claims (1)

output 8 signals corresponding to the function of extracting the square and cubic root of the input signal without methodical error. Invention Formula five A functional converter containing three multipliers and three adders, the first inputs of the first and third adders are connected to the reference voltage bus, the first input of the second adder is connected to the output of the second multiplier and the second input the first adder, the second input of the third adder is connected to the output of the first multiplier and the third input of the second adder, the output of the second adder is the first output of the converter, and the first input of the first multiplier is connected to the second input of the second multiplier, and in order to expand the class of reproducible functions in it, the first output of the converter is connected to the fourth inputs of the first and second adders, to the first s by the second inputs of the first multiplier and to the third input of the third adder, the output of the first multiplier is connected to the first input of the second multiplier and to the third input of the first accumulator, and the output of the first adder is the second output of the converter and connected to the fifth input of the first adder and to the first input of the third multiplier, the second input of which is connected to the output of the third adder, and the output to the sixth input of the first an adder, wherein the second input of the second adder is connected to the information input of the converter.