SU1626222A1 - Device for testing auto-frequency amplifiers - Google Patents

Abstract

The invention relates to a control measuring technique and can be used to automatically check the parameters of low-frequency amplifiers, in particular, non-linear distortion coefficients both in the production process of these amplifiers and at the input control. The purpose of the invention is to increase the reliability of the control. The goal is achieved by measuring the non-linear distortion factor for different levels of a stable output signal. The device contains a programmable sinusoidal generator 1, terminal 2 for the input and terminal 3 for the output of a controlled amplifier, the equivalent of 4 loads, comparators 5.1 ... 5.P, selectors 6.1 ... 6.P, element OR-NOT 7, trigger 8, the indicator 9, the control unit 10, the constant voltage generator 11, the amplifier 12, the rectifiers 13 and 16, the attenuator 14 controlled, the adder 15 and the shift register 17. In accordance with the signals generated by the control unit 10, the transfer coefficients are changed programmable sine wave generator 1 and control of the attenuator 14. In this case, a variable current signal of stable magnitude is set at the output of the low-frequency amplifier under test, which is measured and recorded in trigger 8. The glow of the indicator 9 indicates that the control object is in good condition. 3 hp f-ly, 5 silt (L S

Description

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The invention relates to instrumentation engineering and can be used for automated testing of parameters of low-frequency amplifiers, in particular, non-linear distortion coefficients, both in the production process of these amplifiers and at the input control.

The purpose of the invention is to increase the reliability of control by measuring the nonlinear distortion coefficient for different levels of a stable output signal. Figure 1 is a block diagram of a device for testing low frequency amplifiers; FIG. 2 is a block diagram of a program of a rotatable sinusoidal generator; FIG. FIG. 3 is a functional diagram of the selector: FIG. 4 is a block diagram of a control unit; FIG. Fig. 5 shows timing diagrams for the operation of the device.

A device for testing low-frequency amplifiers contains a programmable sinusoidal generator 1, terminal 2 for connecting the input of a controlled amplifier, terminal 3 for connecting the output of a controlled amplifier, the equivalent of a load 4, comparators 5.15.N. selectors 6.16.N, element OR NOT 7, first

trigger 8, first indicator 9, control unit 10, constant voltage generator 11, amplifier 12, first rectifier 13, controlled attenuator 14, adder 15, second rectifier 16, shift register 17.

The programmable sinusoidal generator 1 comprises a sinusoidal generator 18, a controlled voltage regulator 19, a second controlled attenuator 20.

The selector 6 contains an element AND 21, a second trigger 22, a second indicator 23. The control unit 10 comprises an initial setup block 24, an OR element 25, a third trigger 26, an enable button 27, a third indicator 28, a counter 29, a pulse generator 30, a distributor 31 pulses, element 32 delay. The first output of the programmable sinusoidal generator 1 is connected to the terminal. 2 for connecting the input of a controlled amplifier. The input is equivalent to 4 load connected to terminal 3 for connecting the output of a controlled amplifier. The inputs of the comparators 5.15.N are combined, and the outputs are connected to the first inputs of the corresponding selectors 6.1, ... 6.N

The outputs of the selectors 6.16.N are connected to

the corresponding inputs of the element OR NOT 7 The output of the element OR NOT 7 is connected to the first input of the first trigger 8, the second input of which is connected to the second

inputs of selectors 6.16.N and with the first

the output of the control unit 10, and the output to the input of the first indicator 9. The input of the first controlled attenuator 14 is connected to

terminal 3 to connect the output of the controlled amplifier, and the output is connected to the input of the first rectifier 13 and to the first input of the adder 15. The output of the adder 15 through the second rectifier 16 is connected to

0 inputs of comparators 5.1 5.N. Second

the input of the adder 15 is connected to the second output of the programmable sinusoidal generator 1. The first input of which is connected to the output of the first rectifier 13, and

5, the second input is connected to the output of the direct voltage generator. The input of the unit 11 is connected to the second output of the control unit 10, the third output of which is connected to the third inputs of the selectors 6.1, .., 6.N. Fourth

0 and the fifth outputs of the control unit 10 are connected respectively to the first and second inputs of the shift register 17. The high-order output of the shift register 17 is connected to the input of the control unit 10 and with

5 by the third input of the first trigger, and the other N outputs are connected to the fourth inputs of the respective selectors 6, with the corresponding control inputs of the programmable sinusoidal generator 1 and

0 by the respective control inputs of the first controlled attenuator 14.

The output of block 24 of the initial installation is connected to the first input of the element OR 25. The output of which is connected to the R-input

5 of the third trigger 26. The second input of which is connected to the switch-on button 27 and the first output of the control unit 10, the second, third and fourth outputs of which are connected respectively to the first, second

0 and the third outputs of the pulse distributor 31, the input of which is connected to the output of the counter 29; the input of the counter 29 is connected to the output of the pulse generator 30, and b: the input to the third input of the indicator 23, to the output of the third trigger 26 and the fifth output control unit 10. The input of the control unit 10 through the element 32 of the delay is connected to the second input of the element OR 25.

0The direct output of a sinusoidal generator 18 is connected to the input of a controlled voltage regulator 19, the output of which is connected to the first input of the second controlled attenuator 20, the output

5 of which is connected to the first output of the programmable sinusoidal generator 1, the second output of which is connected to the inverse output of the sinusoidal generator 18. The input is connected to the control ROCK of the controlled voltage regulator 19, and

the respective control inputs are connected to the corresponding control inputs of the second controlled attenuator 20.

The output of the second trigger 22 is connected to the input of the second indicator 23 and the output of the selector 6, the first input of which is connected to the D input of the second trigger 22, the second input to the R-input of the second trigger 22, the third input to the first, and the fourth to the second input element And 21, the output of which is connected to the C-input of the second trigger 22.

The device works as follows.

When a test amplifier is connected to terminals 2 and 3 and when the power supply is turned on (not shown in Fig. 1), the initial installation unit 24 provides for resetting the trigger 26 (Fig. 5), which is in this state before actuation of the switch-on button 27 and thus keeps the counter 29 and the shift register 17 in the initial state. Pressing the switch-on button 27 on the R input of the trigger 8 and the trigger 22 of the selectors 6.1, .., 6 N from the first output of the control unit 10 receives a signal setting the specified triggers to their original state When the trigger button 27 is released by the back photon of the pulse (Fig. 5), the trigger 26 switches to the single state, which causes the Work indicator 28 to light up, the resolution of the counter 29 and the shift register 17. The counter state 29 changes for each act generator 30 pulses. The change in the state of the counter 29 leads to the formation of signals at the outputs of the pulse distributor 31, which can be performed on programmable logic arrays, permanent memory devices or assembled on discrete logic elements. The signals at the outputs of the pulse distributor 31 should correspond to the signals of the timing diagram 10-2, 10 4, 10-3 in FIG. 5. The signal 10-4 modifies the state of the shift register 17. After the first pulse 10-4, the first output of the shift register 17 becomes active, and it controls the state of the first 14 and second 20 controllable attenuators, as well as entering the fourth input of the selector 6.1, selects this selector from group 6.1,. ., 6.N.

After the switching of the controlled / attenuator 14 and 20 is completed, the pulse distributor 31 generates the next signal 10-2, which is supplied to the constant voltage generator 11, at the output of which a trapezoidal signal is generated, increasing from zero to a predetermined value. Similarly, the signal at the output of amplifier 12, which controls 5 the operation of voltage regulator 19, changes. Thus, the output of the controlled attenuator 20 will also begin to receive an alternating current signal of a given frequency, which through terminal 2 enters the input of the tested 10 low-frequency amplifier. At a load equivalent of 4, a variable current signal is released, coming from the output of a low-frequency amplifier under test — through terminal 3. This signal, passed

5 through the first controlled attenuator 14. is fed to the input of the rectifier 13, and the direct current signal from the output of the rectifier 13 is fed to the second input of the amplifier 12. Thus, the tested low-frequency amplifier is covered by the feedback loop of the amplifier 12 and its output is set to a constant current signal of a stable value, regardless of the gain value of the tested 5 low frequency amplifier.

The alternating current signal from the output of the first controlled attenuator 14 is also fed to the first input of the adder 15, to the second input of which a sinusoidal distant signal of the same value is fed, but inverse in phase from the second inverse output of the sinusoidal generator 18. Thus, at the output of the adder 15, - the signal is proportional

5 the differences of the indicated signals, the magnitude of this difference is proportional to the non-linear distortion coefficient of the tested low-frequency amplifier. After rectifying by the second rectifier 16, the signal is sent to the comparators 5.1, .., 5.N. the response levels of which correspond to the specified levels of nonlinear distortions at a given output power of the signal of the tested amplifier of nonlinear distortions.

The signal 10 3 from the output of the distributor 31 pulses is supplied to the third inputs

selectors 6 16 N and gates trigger

22 selectors 6 1. in which is written

0 information depending on the state at the output of the corresponding comparator 5.1.

If the non-linear distortion at the output of the tested low-frequency amplifier 5 is less than the set value, then the trigger 22 remains in the initial state, otherwise it switches, which causes the indicator 23 to light up, which indicates that the low-frequency amplifier under test has non-linear distortion

at a given output power exceeds the allowed value. Upon completion of the pulse 10-3, the action of the signal 10-2 also ceases, which leads to a decrease in the signal at the output of the constant voltage generator 11 up to zero. The magnitude of the signal input to the input of the tested low-frequency amplifier decreases, and hence the magnitude of the signal at its output decreases.

The emergence of a new pulse at the fourth output of control unit 10 (signal 10-A, Fig.5) causes a change in the state of the shift register 17, which switches controlled attenuators 14 and 20, and a new cycle of measuring the parameters of the low-frequency amplifier starts at another the output power, since the first attenuator 14 provides such a division of the output signal from the low frequency amplifier under test so that the output of the rectifier 13 always sets the same value of the constant current signal . The second controlled attenuator 20 provides the setting of the possible input range for the tested low frequency amplifier signal depending on the amplitude parameters of the amplifiers and the output signal power, and the voltage regulator 19 controlled by the amplifier 12 ensures accurate setting input signal to obtain the required output signal power of the amplifier under test.

If during the measurement at least one trigger 22 of selectors 6.1, ..., 6.N is switched, this results in the appearance of a zero signal at the D input of the trigger 8, otherwise, n the moment of a positive differential on the Eschod (n 4 2) bit shift register 17 sets the level of logical units. Thus, the trigger 8 is set to the state that is determined by the state of the flip-flops. If the low-frequency amplifier under test does not meet its technical requirements for at least one output power, then the trigger 8 remains in the initial state and is not displayed. 9 GODEN does not light up, otherwise the glow of the indicator 9 indicates the conformity of the tested product to its specifications.

The signal from the output of the shift register 17 bits (n + 1) enters through the delay element 32 and the element IPI 25 to the R input of the trigger 26 and sets it to the initial state. The indicator 2R of the LED goes out.

The counter 29 and the shift register 17 are reset, therefore after a time equal to the delay time of the element 32. The output signal (n + 1) of the shift register 17 is reset.

Claims (4)

Invention Formula 1 Amplifier Checker low frequency, containing programs, a sinusoidal oscillator, the first output of which is connected to the cream for connecting the input of the controlled amplifier, the load equivalent, the input of which is connected to the terminal for connecting the output of the controlled amplifier, N comparators, the inputs of which are combined, and the outputs are connected to the first the inputs of each of the N corresponding selectors, the outputs of which are connected to the corresponding inputs of the OR-NOT element, the output of which is connected to the first input of the first trigger, the second input of which is connected Inen with the second inputs of each of the N selectors and with the first output of the control unit, and the output with the input of the first indicator, characterized in that. in order to increase the control accuracy by measuring the nonlinear distortion factor for different levels of stable output signal, a DC voltage generator, an amplifier, a first and second rectifier, an adder, a shift register, and a first controlled attenuator, the input of the first controlled attenuator is connected to the terminal for connecting the output of the monitored amplifier, and the output is connected to the input of the first rectifier and the first input of the adder, the output of which through the second rectifier is connected to the inputs of N comparators, the second input of the adder is connected to the second output of the programmable sinusoidal generator, the input of which is connected to the output an amplifier, the first input of which is connected to the output of the first rectifier, and the second input - to the output of a constant voltage generator, the input of which is connected to the second output of the control unit, the third output of which is connected to the third inputs of each and 4 Y selectors, the fourth and fifth the outputs of the control unit are connected respectively to the first and second inputs of the shift register, the output of the higher bit 5 and which is connected to the input of the control unit and to the third input of the trigger and the other N outputs are connected to the fourth inputs of the corresponding selectors with corresponding control inputs of the programmable oscillator sinusoidapnogo and the corresponding control inputs of the first controlled attenuator. 2. A pop. 1 distinguishing device - with the fact that the control unit contains a setup block, an OR element, a second trigger, a power button, an indicator, a counter, a pulse generator, a pulse distributor and a delay element, the output of the setup block being connected to the first the input of the OR element, the output of which is connected to the R input of the second trigger, the second input of which is connected to the on button and the first output of the control unit, the second, third and fourth outputs of which are connected respectively to the first, second and third outputs The signals of the pulse distributor, whose input is connected to the counter output, the C input of which is connected to the pulse generator output, and the R input to the second indicator input, the second trigger output and the fifth output of the control unit, whose input is connected to the delay element the second input element OR. 3. Pop 1 device, characterized by the fact that the programmable sinusoidal generator contains a sinusoidal a generator, a controlled voltage regulator and a second controlled attenuator, with the direct output of the sinusoidal generator connected to the input of the controlled voltage regulator, the output of which is connected to the first input of the second controlled attenuator, the output of which is connected to the first output of a programmable sinusoidal generator, the second the output of which is connected to the inverse output of the sinusoidal generator, the input to the control input of the controlled voltage regulator, and the control inputs are connected to the corresponding control the inputs of the second controlled attenuator. 4. The device is pop. 1. distinguishing with the fact that the selector contains the element I, the third trigger and the third indicator, and the output of the third trigger is connected to the input of the third indicator and the output of the selector, the first input of which is connected to the D input of the third trigger, the second input to the R input of the third trigger, the third input to the first. and the fourth - with the second input element And, the output of which is connected to the C-input of the third trigger. FIG. 2 Fi.Z T  FT