SU1557207A1 - Device for controlling linear density of draw frame sliver - Google Patents

Abstract

The invention relates to control means and can be used on textile machines. The goal is to improve the accuracy of regulation. The device contains a linear density sensor of the tape 4, output connected via serially connected analog-to-digital converter 7, memory element 9 and digital-to-analog converter 12 to the input of control unit 2 of control unit 1. Values of measured linear density parameters of tape 4 are recorded in memory element 9 With some delay, corresponding to the duration of the passage of the tape 4 to the exhaust device, flow into the control unit 2 of the exhaust device 1. 3 Cp. f-ly, 4 ill.

Description

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The invention relates to control means and can be used on textile machines.

The purpose of the invention is to improve the accuracy of regulation.

FIG. 1 shows a block diagram of the device; in fig. 2 - the same, the unit mode of operation; in fig. 3 - the same switch; in fig. A - time diagram of the switch.

The device contains a stretcher 1 of a tape machine, a stretcher control unit 2, a tape linear density sensor 3, the unevenness of which is controlled by a tape linear density controller 5, a memory element control block 6, an analog-to-digital converter 7 whose input is connected to the output the linear density sensor 3 of the tape b, and the output to the multi-bit bus 8 input data of the memory element 9 having input (8), output 10 and address 11 multi-bit buses, a digital-to-analog converter 12, whose input is connected to the output & a mp; memory buses 10, memory element 9, a kinematic coupling 13 connects the feed rollers of the exhaust device 1 (not shown) and the input of the clock generator 1, the output of which is connected to the switch 15. The counter 16, the electronic key 17 of which is connected to the output F of the switch 15, the inputs of the electronic key (according to the number of bits of the counter 16) are connected to the outputs of the counter 16, and the outputs to the address bus 11 of the memory element 9. The electronic key 18, the inputs of which are connected (according to the number of bits) to the output of the counter 19 has preset buses 20, to which the outputs of the operation mode setting indicator 21 are connected. The outputs of the electronic switch 18 are connected to the address buses 11 of the memory element 9, and its control input to the output Fu of the switch 15.

The operation mode setting unit 21 is a set of switches, the number of which corresponds to the number of bits of the counter T9. The first inputs of the switches are interconnected and a logical zero (O) signal is applied to them, the second inputs of the switches that are also interconnected are signaled with a logical unit (1) .1

The switch 15 is made on the basis of the trigger 22, the input of which gives

Q

five

with the signal G from the generator 1 clock pulses. From the same generator, a signal is fed through the inverter 23 to the input of the AND 2k logic element. The output W of the logic element 2A, the direct and inverse outputs F4 and F, the trigger 22 are the outputs of the switch 15.

The device works as follows.

The mode setting unit 21 sets a number code corresponding to the time of readout advance from the moment the information is written (the required number of offset pulses). After starting the machine from the linear density sensor 3 to the input of the analog-digital converter 7, a signal is received about the unevenness of the tape C at the input to the exhaust device 1. In the analog-digital converter 7, the information is converted into a code set on the input buses 8 of the data of the memory element 9 .

At the same time, the clock pulse generator C emits, when the tape is moving, pulses with a frequency corresponding to the tape moving speed k from the measurement point to the stretch zone of the exhaust device 1 (not shown). The outputs of the switch 15 are formed signals W, F ,, V

At time t, the levels of the signals G and W correspond to the logical unit (G 1, W 1) at the control inputs of the memory element 9. In this state, memory element 9 does not perceive information from data bus 8. Under the action of a high level of the signal F, (Rl 1), the counter on its output buses exposes the code corresponding to the first pulse, and the electronic key 17 connects the buses 11 of the address of the memory element 9 to the outputs of the counter 16.

On address buses 11, a code is set, the address of which corresponds to the first (count) pulse. At the moment ta, when the levels of the signals G and W correspond to a logical zero (GW 0), information from the data bus 8 is recorded in the memory cell of the element 9 at the address whose code exists at that moment at the output of the counter 16 and is transmitted through the public electronic key 17 to address buses 11 of memory element 9. At time t3, the memory element 9 does not perceive information (G 1, W 1), the electronic key 17 turns off the output of counter 16 from ad11, and under the action of a high level signal F2 (F4 1), the electronic key 18 connects the address buses 11 to the output counter 19. At the output of counter 19, a code is set corresponding to the number of presets plus the number of incoming pulses (in this case, one). This will be the cell address of the memory element 9, from which its contents will be read at time t, when the control signals have values C O, W 1. At time t5, memory element 9 under the influence of signals G 1, W 1 again enters a state in which information from the bus 8 data is not received in the memory cells. By this time, the output of the counter 16 is set

the code corresponding to the two two pos-20 devices, the control unit of the element, the pulses received at its input

a memory containing a mode setting unit and a series-connected clock pulse generator, kinematically connected with the rollers of the 25th instrument, and a switch, the first output of which is connected to the first information input of the memory element, which is In order to increase the control accuracy, the control unit of the memory element additionally contains counters and electronic keys, the second output of the commutator being connected to the input of the first counter and the controlling input of the first electronic key, and the third output - from the input The second counter and the control input of the second electronic key, the address outputs of the electronic keys are bitwise combined between themselves and connected to the information inputs of the memory element, and the information inputs of the electronic keys are connected to the outputs of the corresponding counters, while the output of the clock generator connected to the second input of the memory element, the installation inputs of the first counter are connected to the output of the operation mode setting unit.

F 1, and at time t & the information is recorded in the next memory cell, whose address corresponds to the code of the number of pulses at the output of the counter 16. The electronic key 18 keeps the outputs of the counter 19 disconnected from the address bus 11, etc.

Thus, from the memory cells whose address corresponds to the code of the number of pulses plus the number of the preset, information will be read out and transmitted through the bus 10 of data to the input of the digital-to-analogue converter 12 and further to the information input of the control unit 2 of the control unit 1. the address of which corresponds to the code of the number of pulses received at the input of the counter will record the information coming from the data bus 8. The counters have the same conversion factor corresponding to the number N of control points of the tape segment k from the measurement point to the stretch zone (for example, N 120), so the second counter will reach this number faster and after returning it will start the counting with zero. By this time the first counter will count ( N - Nnp) pulses where N. is the number of presets of the second counter. Therefore, starting with the cycle (N - N +1) on the bus 10 of the data of the memory element 9, the information is recorded in the memory cells at the addresses formed by the first counter. The storage time of the memory device is determined by the number of pulses.

and period

 (N - N

R

T, according to the formula

) T,. Period T. oprede,

It is conveyed by the speed of transporting the belt k by feeding rollers. Depending on the machine design and the type of material, the memorization time varies, therefore the memorization time t is set by

-tan select the required number N,

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Claims (3)

1. An apparatus for adjusting the linear density of a belt machine belt, comprising a linear density sensor located in front of a exhaust device and an output connected through an analog-digital converter connected in series, a memory element and a digital-analog converter 0 device control unit element 0 a memory containing a setting mode of operation and a series-connected clock pulse generator, kinematically connected with the rollers of an exhaust device, and a switch, the first output of which is connected to the first information input of the memory element, which is in order to increase the control accuracy, the memory element control unit further comprises counters and electronic keys, the second output of the switch being connected to the input of the first counter and the control input of the first electronic key, and the third output — from the second counter and the control input of the second electronic key, the address outputs of the electronic keys are bitwise interconnected and connected to the information inputs of the memory element, and the information inputs of the electronic keys are connected to the outputs of the corresponding counters, while the output of the clock generator is connected with the second input of the memory element, the installation inputs of the first counter are connected to the output of the operation mode unit. 2. The device according to claim 2, characterized in that the clock pulse generator is made in the form of a rotational speed sensor. 3. The device according to claim 1, characterized in that the operation mode adjuster is designed as a set of switches. J. The device according to claim 1, characterized in that the switch contains a trigger, an inverter and a logic. five 0 five five And, the first trigger input and the inverter input are interconnected and are the input of the switch, and the inverter output and the inverse output of the trigger are connected to the corresponding inputs of the AND logic element, the output of which is the first output of the switch, while the inverse output of the trigger is connected its second input is the second output of the switch, and the forward trigger output is the third output of the switch,