SU1550205A1 - Shaper of pulses for correction of ingition angle by knocking signals - Google Patents

Abstract

The invention relates to automotive electronics and can be used, in particular, to correct the timing of ignition in electronic ignition systems in internal combustion engines by detonation signals. The aim of the invention is to optimize the ignition angle correction amount by ensuring that a correction value is generated separately for each cylinder. The goal is achieved by introducing into the generator 2 generator the correction pulses of the first, second, third and fourth registers 4, 5, 6, 7, the result restriction unit 12, the adder 13, the encoder 11, the selector multiplexer 14, the knock signal selector 3, the control unit 1 as well as connections between elements and blocks, which ensures independence of the amount of ignition angle correction in other cylinders when detonation occurs in any one cylinder of the engine. 10 il.

Description

VHOZZ Sxotl Rxttfl

with

with

Ignition of the ignition angle correction value by ensuring the formation of a correction value separately for each cylinder. The goal is achieved by introducing into the generator 2 generator the correction pulses of the first, second, third and fourth registers 4,5,6,7 of the result restriction block 12, adder 13, JQ

The invention relates to automotive electronics and can be used, in particular, to correct the ignition timing in electronic ignition systems in internal combustion engines using signals from a knock sensor.

The purpose of the invention is to optimize the magnitude of the correction of the angle of ignition by ensuring the formation of a correction value separately for each cylinder.

Figure 1 shows the structural diagram of the proposed shaper; in fig. 2 - timing diagrams that show the work of the driver; in fig. 3 is a functional diagram of one of the embodiments of the control unit; in fig. 4 is a functional diagram of one of the embodiments of the correction pulse generator; in fig. 5 is a functional diagram of one of the embodiments of the detonation signal selector; FIG. 6 is a functional diagram of one of the embodiments of the cylinder identification unit; in fig. 7 is a functional diagram of one of the variants of the multiplexer implementation; in fig. 8 is a functional diagram of one of the variants of the implementation of the encoder; in fig. 9 is a functional diagram of one of the embodiments of the result limiting unit; in fig. 10 - functional diagram of one of the options for the implementation of the selector-multiplexer.

The driver contains a control unit 1, the first input of which is connected to the first input bus (input 1) and the second input is connected to the second input bus (input 2). First exit

the control unit 1 is connected to the input of the generator 2 recording of the correction pulses, the second output is connected to the first input of the selector 3 of the detonation signal and

the encoder 11, the selector-multiplexer 14, the selector of the detonation signal}, the control unit 1, as well as connections between the elements and blocks, which ensures the independence of the ignition angle correction value in other cylinders when detonation occurs in any one cylinder of the engine. 1 tab. 10 il.

0

-

five

5. 45

50

55

inputs of register registers 4-7, the third output is with an input of identification 8 and the fifth input of multiplexer 9. The output of the correction pulse generator 2 is the output of the driver, and its information input is connected to the information output of the register 6. The second input of the knock signal selector 3 connected to the third input bus (input 3), and the output of the selector 3 of the detonation signal is connected to the fifth input of the multiplexer 10, the first input of the encoder 11 and the first input of the result restriction unit 12. The information input of register 4, bitwise, is connected to the information output of the result limiting unit 12, and the information output of register 4, bitwise, is connected to the informational input of register 5, whose information output is connected to the informational input of register 6, whose information output is connected bitwise to the informational input register 7, the information output of which is connected bitwise to the second input of the adder 13. The outputs of the block 8 for identifying the cylinders from the first to the fourth are connected to but first to fourth inputs of the multiplexers 9 and 10, with the control-multiplexer selector inputs of multiplexer 14. The outputs 9 from the first to the fourth are connected to counting inputs of counters 15-18, respectively. Multiplexer outputs

10c from the first to the fourth are connected to the reset inputs of the counters 15-18, respectively. The second input of the encoder

11 is connected to the output of the selector-multiplexer 14. The information output of the encoder 11 is connected to the first input of the adder 13. The information input of the result restriction unit 12 is connected to the output of the sum of the adders

51550205

13, the second input is with the output of the selector-multiplexer 14, the third input is with the transfer output of the adder 13. The overflow outputs of the counters 15-18 are connected from the first to the fourth inputs of the selector-multiplexer 14.

The control unit 1 contains the element OR 19, the binary counter 20, the encoder 21, the elements OR 22-24, the RS flip-flops 25-27 and the element OR 28. The first input of the element OR 19 is connected to the second input bus (input 2). The counting input of the counter 20 is connected to the first

The knock signal selector 3 contains an AND 33 element, an OR 34 element, and an RS flip-flop 35. The first input of the AND 33 element is connected to the third input bus (input 3), and its second input is connected to the Stro input. The output of the element AND 33 is connected to the S-input of the RS trigger 35. The first input of the element OR 34 is connected to the input of the Strobe of the selector 3 of the knock signal. The second input element OR 34 is connected with the departure of the signal of the initial installation (NU) of the selector 3 of the detonation signal.

input bus (input 1), reset input IB The output of the element OR 34 is connected to R-counter 20 connected to the output of the element OR 19. The information output of the counter 20 is bitwise connected to the inputs of the decoder 21. The outputs a, c, e of the decoder 21 are connected to S-inputs RS-flip-flops 25-27, the outputs b, d, f of the decoder 21 are connected respectively to the first inputs of the elements OR 22-24. Second inputs of the element OR 19

the trigger input 35, the output of which (is the D-output of the detonation signal of the selector 3 of the detonation signal.

Block 8 identification of cylinders Q contains a binary counter 36 and a decoder 37. The counting input of the counter 36 is connected to the input BUT, and the R-input of the counter 36 is connected to the input of the signal of the initial installation (NU) of block 8

OR 22-24 are connected to inlet-25 cylinder identification. Outputs by30

35

and elements

house signal initial setup (WELL)

unit 1 control.

The outputs of the elements OR 22-24 are connected respectively to the R-inputs of RS flip-flops 25-27. The outputs of the RS flip-flops 25 and 26 are the outputs of the Record and Strobe signals of the control unit 1, respectively. The output of the RS-flip-flop 27 is connected to the third input of the element OR 19 and the first input of the element OR 285 whose second input is connected to the second input bus (input 2), the output of the element OR 28 is the output of the reference signal (BUT) of the control 1 .40

Generator 2 correction pulses contains a reversible binary counter 29 with a preset, the element OR NOT 30, the generator 31 clock pulses and the element OR 32, the D-input of the installation of the counter 29 is connected to the information bus Qn. The WR-input of the record of the counter 29 is the input of the recording of the correction pulse generator, the information output of the counter 29 is connected in bit with the inputs of the element OR-NOT 30, the output of which is connected to the first input of the element OR 32, the second input of which is connected to the output of the generator 31 clock pulses , the output of the OR element 32 is connected to the countdown input of the counter 29 and is

The chip 36 is bitwise connected to the decoder 37, the outputs X, Y, Z, K of which are the outputs of the cylinder identification block 8.

The multiplexer 9 contains AND 38-41 elements, the first inputs of which are connected respectively to the inputs X, Y, Z, K of multiplexer 9, the second inputs of AND 38-41 elements are connected to the input of the NO signal of the multiplexer 9. The outputs of the And elements 38-41 are outputs multiplexer 9.

The device of the multiplexer 10 is similar to the device of the multiplexer 9 with the only difference that the second inputs of its elements And are connected to the D-input of the multiplexer 10.

The encoder .11 contains the elements OR NOT 42 and 43. The input element OR NOT

45 42 is the input of P, the encoder 11. The output of the element OR-NO 42 is connected to the first input of the element OR-NO 43, the second input of which is the D-input of the encoder 11. The output of the element

gQ OR-NOT 43 is the low-end output of the information output A „of the encoder 11, and the D-input of the encoder 11 is directly connected to the outputs of the remaining bits of the information output

55 A of the encoder 11.

The result limiting unit 12 comprises an inverter 44, an OR element 45, AND-HE elements 46-53, and a Z-NE element 54. The input of the inverter 44 is the D-output of the generation (output).

2 impulses correction 5

The knock signal selector 3 contains an AND 33 element, an OR 34 element, and an RS flip-flop 35. The first input of the AND 33 element is connected to the third input bus (input 3), and its second input is connected to the Stro input. The output of the element And 33 is connected to the S-input RS of the trigger 35. The first input of the element OR 34 is connected to the input of the Strobe selector 3 of the detonation signal. The second input element OR 34 is connected with the departure of the signal of the initial installation (NU) of the selector 3 of the detonation signal.

The output of the OR element 34 is connected to the R input of the trigger 35, the output of which (is the D-output of the detonation signal of the selector 3 of the detonation signal.

Block 8 identification of cylinders contains a binary counter 36 and a decoder 37. The counting input of the counter 36 is connected to the input BUT, and the R-input of the counter 36 is connected to the input signal of the initial installation (NU) of block 8

0

five

0

The chip 36 is bitwise connected to the decoder 37, the outputs X, Y, Z, K of which are the outputs of the cylinder identification block 8.

The multiplexer 9 contains AND 38-41 elements, the first inputs of which are connected respectively to the inputs X, Y, Z, K of multiplexer 9, the second inputs of AND 38-41 elements are connected to the input of the NO signal of the multiplexer 9. The outputs of the And elements 38-41 are outputs multiplexer 9.

The device of the multiplexer 10 is similar to the device of the multiplexer 9 with the only difference that the second inputs of its elements And are connected to the D-input of the multiplexer 10.

The encoder .11 contains the elements OR NOT 42 and 43. The input element OR NOT

5 42 is the input of P, the encoder 11. The output of the element OR-NO 42 is connected to the first input of the element OR-NO 43, the second input of which is the D-input of the encoder 11. The output of the element

OR NOT 43 is the low-order output of the information output A „of the encoder 11, and the D-input of the encoder 11 is directly connected to the outputs of the remaining bits of the information output

5A „encoder 11.

The result limiting unit 12 comprises an inverter 44, an OR element 45, AND-NOT elements 46-53 and a Z-NO element 54. The input of the inverter 44 is the D input of the result limiting unit 12. The output of the inverter 44 is connected to the first input of the element OR 45 and the first input of the element ZI-HE 54. The second input of the element OR 45 and the second input of the element ZI-HE 54 are the C input of the result limiting unit 12. The third input of the ZI-NE element 54 is the input of P, the result limiting unit 12. The output of the element OR 45 is connected to the first inputs of the elements AND-HE 46, 48.50 and 52. The second inputs of the elements AND-HE 46,48,50 and 52 are connected bitwise with the input information bus 1S. The output of the element ZI-NOT 54 is connected to the first inputs of the elements AND-NO 47, 49, 51 and 53. The outputs of the elements AND-NO 46,48,50 and 52 are connected respectively to the second inputs of the elements AND-NO 4 /, 49, 51 and 53, the outputs of which are bus Dh.

The selector-multiplexer 14 contains elements AND 55-58 and element 4ILI 59. The first inputs of elements AND 55-58 are respectively inputs X, Y, Z, K of the selector-multiplexer 14, the second inputs of elements AND 55-58 are inputs P ,, Р а, РЭ and Р4 selector-multiplexer 14, respectively. The outputs of the elements 55-58, respectively, are connected to the inputs of the element 4ILI 59. The output of the element 4ILI 59 is the output of the P-selector-multiplexer 14.

The shaper works as follows.

The initial setup signal on all outputs of the control unit 1, the detonation signal selector 3 and the cylinder identification block 8 are set to the state of logical zeros. Registers 4-7 are set to the state of logical units (in FIG. 1, the initial setup signal is not shown). The control unit 1 from the first input bus (input 1) receives angular pulses used to calculate the angular position of the engine crankshaft, and from the second input bus (input 2), the reference pulses are received, each of which is generated once per crankshaft revolution engine The control unit 1 at its outputs generates the Record, Strobe and BUT signals according to the timing diagrams (Fig. 2). The BUT signal is generated after each rotation of the engine crankshaft and is used to synchronize the formation of

The bodies of ignition angle correction pulses with engine cylinder operation. The Strobe signal is formed by a high level after the BUT signal and corresponds to a certain angular sector of the engine crankshaft rotation, in which detonation is likely to occur.

SIGNAL Recording is formed by a high level after the BUT (but before the Strobe signal) and is recorded before the next BUT signal. The BUT signal is fed to the input of the cylinder identification block 8, at the four outputs of which high-level signals are alternately generated, the duration of which is equal to the period of the BUT signals. Upon the arrival of the first HO signal, the first output of the cylinder identification unit 8 is set to the state of a logical unit, the next signal BUT, this first output is reset to the state of logical zero, and the second output is set to the state of logical one. The next NO signal sets the third output to the high state, while resetting the second output to the low state. The subsequent NO signal sets the fourth output of the cylinder identification block 8 to the high level state, resetting the third output to the low level state. Upon further receipt of the NFR signals, the process of generating signals at the outputs of the cylinder identification block 8 is repeated. Thus, at the outputs of the cylinder identification unit 8, the number of which is equal to the number of engine cylinders, high level signals are generated that identify the operation of any engine cylinder, and each of them has its own output of the cylinder identification unit 8.

The detonation signal selector 3 receives the detonation signals via the third input bus (input 3), while the Strobe signal from the control unit 1 is received at the other input of the detonation signal selector 3. At the output of the detonation signal selector 3, under the condition of a high level of the Strobe signal and the input signal to the third input bus (at input 3), a detonation signal is formed according to the time diagrams (Fig. 2). This signal carries information only about the detonation of the engine and is free from signals of other engine noise.

At the initial moment of time, according to the foty of the first signal HO, the X-output of the cylinder identification block 8 is set to a high level. If at the moment of a high level the Strobe signal following the BUT signal is throttled by the input bus (input 3 receives a pulse, then the output of the selector 3 of the detonation signal generates the signal D. The signal D arrives at the fifth input of the multiplexer 10 and The x-output of cylinder identification block 8) is transmitted to the first output of multiplexer 10. This signal resets the counter 15 to the zero state. In addition, the signal arrives at the first input of the encoder 11. The encoder 11 generates a code at its information input l ugza varying correction amount of ignition. By detonation signal D encoder

11 forms an additional code for the number that in the selected variant

the encoder is two. The information output of the encoder 11 is the input of the first operand Ah of the adder 13. The input of the second operand Bh of the adder 13 is the information output of the register 7, in which, after initial installation, there was a code from all the units. Thus, at the output of the sum Sh of the adder 13 a difference is generated between the values of the register codes 7 and the encoder 11, the difference of which will be two less than the operand B. Section Output of the sum Sn of the adder -13 goes to the information input block 12 of the result limit. In addition, the first input of the result restriction unit 12 receives the detonation signal D, the third input receives the transfer signal C of the adder, and the second input through the selector-multiplexer I receives the signal P. overflow of the counters 15-18. Block

12 limiting the result forms

at its information output, the Dh code is equal to the result of the adder 13, if the sum of Sn is not a negative number and if the sum of Sn does not exceed the selected size of the adder 13. Thus, in this situation, the Dh code is equal to the sum of Sh. The Dn code is fed to the information input of the register k and, by the signal decay, the Strobe is written to the register k (Fig. 2). By the same signal, the information is copied from register k to register 5, from register 5 to register 6, and from register 6 to register 7. Thus, after the first clock of the driver, defined by a high level on the X output of block 8 the cylinder identification code in register k stores the code of the ignition angle correction value corrected by the detonation signal, and register 7 stores the code for the correction angle for the ignition angle, which will be corrected in the next cycle (the generator's operation. In the first cycle, the generator 2 pulses signal corrections The recording at its output, and hence at the output of the imager, forms a burst of pulses, the number of which is equal to the Qn code. The Qh code is fed from the information output of the register 6 to the information input of the correction pulse generator 2 (Fig. 2). starts with the arrival of the next NO signal. In this case, the Y-output of the cylinder identification block 8 is set to a high level. Further, if the detonation signal D at the output of the knock signal selector 3 does not play, then the counter 16 increases the state by one between The fact that from the second output of the multiplexer U, which is connected to the counting input of the counter, is 6, the signal BUT arrives. If overflow in the counter 1b does not occur, then a low level is formed at the output of the selector-multiplexer 1. Thus, in the absence of a detonation signal and a P signal; overflow encoder 11 generates a zero code. As a result, the adder 13 does not change the second operand of Br and the result of the operation of the adder 13 arrives unchanged at the output of block 12 of the constraint. By dropping the Strobe signal in this cycle, the Dh code is written to register 4, the previous contents of which are rewritten to register 5 by the same signal, similarly from register 5 to register 6, and from register 6 to register 7.

The operation of the driver at subsequent clock cycles is similar to that described above, taking into account whether a detonation is fixed in this clock cycle and whether there is a signal from P. overflow of counters 15-18, since only these signals can lead to a change in the code generated

ten

15

25

encoder 11, and therefore, to change the codes of values stored in the registers A-.

If during a certain number of clock cycles there is no detonation at a high level (for example, X from the output of the cylinder identification block 8), then the counter 15 counts the NO pulses coming from the control block 1 through the multiplexer 9. When the counter 15 overflows, the P signal overflows arrives at the first input of the selector-multiplexer And, which passes this signal to the output of P1. Thus, in this cycle, the encoder 11 generates the code 00015 and the operand Bp will be increased by the adder 13 by one. The result restriction unit 12 will produce a 2n check of the amount of Sn in the event that the size of the adder 13 is exceeded. If the transfer C of the adder 13 is equal to one at a high level on the output P; the selector multiplexer 1 and a low level on the output of the selector 3 of the detonation signal, the result restriction unit 12 generates a code from all units. If the carry C of the adder 13 is not generated, then the code D at the output of the result restriction block 12 is equal to the operand Bh, incremented by one. By dropping the Strobe clock signal, the generated code Dh is written to register 4. Ta- ,,. In this way, an increase in the magnitude of the correction of the ignition angle, stored in register 7, is achieved in this tact of the driver. Similar operation of the shaper at a high level on any of the outputs Y, Z, K of the cylinder identification block 8, and the overflow signals are generated by the counter 16 either by the counter 17 or by the counter 18.45

If, at a high level (for example, on the Z-output of the cylinder identification block 8), the detonation signal D is generated at the output of the selector 3 of the detonation signal over several cycles, then the encoder 11 generates an additional code of the number two each time, resulting in adder

155020512

The result limiting unit 12 (at a high level of the detonation signal D of the detonation selector 3) produces a zero code at the output.

The order of selecting the code to write to the generator 2 correction pulses in order to provide the ignition angle correction separately for each cylinder is explained in timing diagrams (Fig. 2). The Strobe signal, following the BUT pulse, synchronous (for definiteness) with the operation of the first cylinder, writes to the register k the correction code for this particular cylinder. The correction code of the first cylinder is in register 4 until the next in order of the Strobe signal, after which the correction code for the next cylinder in order is written to register k, and the correction code for the first cylinder is moved to register 5, and so on. Thus, in order for the correction code for the first cylinder to be used by the generator 2 correction pulses to form the ignition angle correction amount, the engine operation cycle for this particular cylinder needs

thirty

40

use Qh code from register information output 6.

The control unit 1 operates as follows. The first input bus (input 1) receives angular pulses used to calculate the angular position of the engine crankshaft, and the second input bus (input 2) receives reference points, each of which is generated once per crankshaft revolution. The counter 20 counts the angular pulses and is synchronized by the signals on the R input. The decoder 21 decrypts certain states of the counter 20, setting, in accordance with them, the outputs a, b, c, d, e, f to a state of logical one. High levels at the outputs a, c, e set the RS-flip-flops 25-27, and high levels at the outputs b, d, f reset these flip-flops using the OR elements. The output of the RS-flip-flop 25 is the output of the Record signal. The output of the RS flip-flop 2b is the output of the Strobe signal.

The control unit 1 operates as follows. The first input bus (input 1) receives angular pulses used to calculate the angular position of the engine crankshaft. The second input bus (input 2) receives counting pulses, each of which is generated once per crankshaft revolution. The counter 20 counts the angular pulses and is synchronized by the signals on the R input. The decoder 21 decrypts certain states of the counter 20, setting, in accordance with them, the outputs a, b, c, d, e, f to a state of logical one. High levels at the outputs a, c, e set the RS-flip-flops 25-27, and high levels at the outputs b, d, f reset these flip-flops using the OR elements. The output of the RS-flip-flop 25 is the output of the Record signal. The output of the RS flip-flop 2b is the output of the Strobe signal.

13 each time reduces the value of the operand Br by two. Starting with a certain -55. The output of the RS-flip-flop 27 is set by the left stroke by the result of the operation of the sum-in the state of the counter 20, and the determinant 13 can get a negative number. In this case, the transfer with the adder 13 is not generated, and

the countdown of the number of angular impulses corresponding to half the rotation of the crankshaft, and faults

use Qh code from register information output 6.

The control unit 1 operates as follows. The first input bus (input 1) receives angular pulses used to calculate the angular position of the engine crankshaft, and the second input bus (input 2) receives reference points, each of which is generated once per crankshaft revolution. The counter 20 counts the angular pulses and is synchronized by the signals on the R input. The decoder 21 decrypts certain states of the counter 20, setting, in accordance with them, the outputs a, b, c, d, e, f to a state of logical one. High levels at the outputs a, c, e set the RS-flip-flops 25-27, and high levels at the outputs b, d, f reset these flip-flops using the OR elements. The output of the RS-flip-flop 25 is the output of the Record signal. The output of the RS flip-flop 2b is the output of the Strobe signal.

The output of the RS flip-flop 27 is set at the counter 20 state,

The output of the RS flip-flop 27 is set at the counter 20 state,

the countdown of the number of angular impulses corresponding to half the rotation of the crankshaft, and faults

131

The states of the counter are 20. Thus, a signal is generated that is phase-shifted relative to the signal on the first input bus (input 1) by 180. This signal synchronizes the counter 20 and the process repeats. The output signal of the RS flip-flop 27 is multiplexed with the signal on the second input axis (input 2) by means of the OR element 28, at the output of which the signal BUT is generated.

The generator 2 pulse correction works as follows. The installation inputs of counter 29 receive a Q code. Signal Record arrives at the recording input of counter 29. This signal is used to preset counter 29. As a result, a low level signal appears at the output of the OR-NOT 30 element if the Qn code is not zero. This low level signal permits the passage of pulses from the clock generator 31 to the output of the element OR 32 and, therefore, to the countdown input of the counter 29. After counting the number of pulses by the counter 29 equal to the Qn code, the counter 29 is zeroed at the output of the element

OR-NOT 30 the level of the logical ignition by the detonation signals is formed.

This unit prevents the further passage of the pulses of the clock generator 31 to the counting input of the counter 29. As a result, a packet of pulses is formed at the output of the OR 32 element, the number of which is equal to the Qh code value.

The selector 3 of the detonation signal works as follows. The third input bus (input 3) receives a detonation signal. High signal level The strobe corresponds to a certain angular sector of the engine crankshaft rotation, in which the most likely detonation. Thus, the element And 33 passes to the output a detonation signal, free from other engine noise. This signal sets the RS flip-flop 35, and the RS flip-flop 35 is reset by the Stroe signal drop. The signal at the output of the RS flip-flop 35 is the detonation signal D.

Block 8 identification of cylinders operates as follows. The counter 36 receives the C-input signal BUT. The signals from the outputs of the counter 36 are decrypted by the decoder 37, at the outputs

14

0

five

five

0

X, Y, Z, whose K signals are generated as shown in FIG. 6

The multiplexer 9 operates as follows. The BUT signal, depending on the state of the X, Y, Z, K outputs of the cylinder identification block 8, can be output to the multiplexer 9 outputs.

The variant of the circuit implementation of the multiplexer 10 is similar to the embodiment of the multiplexer 9.

The encoder 11 is implemented as follows. The detonation signal D and the signal P are overflows to the corresponding inputs of the encoder 11. A code is generated at the outputs of the encoder 11

BUT".

The result restriction block 12 is a combinational circuit. The truth table, explaining the operation of block 12, is shown below.

The selector-multiplexer 14 operates as follows. The inputs X, Y, Z, K receive the enable signals from the cylinder identification block 8, which control the transmission of the overflow signals P ,, P, PZ and P4 to the output Pi.

Optimization of the magnitude of the correction angle

0

five

0

five

is provided by forming a correction value separately for each cylinder. In this case, independence of the values of the ignition angle corrections in the engine cylinders in the event of detonation in any of the cylinders is achieved.

Claims (1)

Invention Formula The ignition correction pulse generator that generates a cylinder identification block, the first to fourth SINGLE outputs are connected to the first to the fourth inputs of the first multiplexer and the first to the fourth inputs of the second multiplexer, first, second, third, fourth counters, counting inputs which are connected, legally, from the first to the fourth outputs of the first multiplexer, and three input buses, which are different, in order to optimize the amount of ignition angle correction by providing a photo mation correction value separately for each cylinder, a correction has been entered pulse generator, the first ( the second, third and fourth registers, Output Limit Block, adder, encoder, selector-multiplexer, knock signal selector, control unit, the first and second inputs of which are connected to the first and second input buses, the first output - to the input of the correction pulse generator , the second output is with the first input of the knock signal selector and with the recording inputs of the first, second, third and fourth registers, the third output is with the input of the cylinder identification unit and the fifth input of the first multiplexer, the second input of the selector C The detonation drive is connected to the third input bus, and the output is connected to the fifth input of the second multiplexer, the first input of the encoder and the first input of the result limiting unit, the outputs of the second multiplexer first to fourth are connected to the reset inputs of the first, second, second, third and fourth counters the outputs of which are connected, respectively, from the first to the fourth inputs of the selector-multiplexer, the control inputs of which 0 five about 25 the first to the fourth are connected respectively to the first to the fourth outputs of the cylinder identification block, the output of the multiplexer selector is connected to the second input of the encoder and to the second input of the result limiting block, the information output of the encoder is connected to the first input of the adder, the second input of which is connected to the information output of the fourth register , the output of the sum of the adder is connected to the information input of the result limiting unit, the third input of which is connected to the transfer output of the adder, the information output The result limiter unit is connected to the information input of the first register, the information output of which is connected to the information input of the second register, the information output of which is connected to the information input of the third register, the information output of which is connected to the information input of the fourth register and the information input of the correction pulse generator, the output of which is the output of the device. Table tf Tf and 9PI sozossi figl FIG. five ft sozosst FIG. 9 n fie. YU