SU1525883A2 - Device for synchronizing pulses - Google Patents

Abstract

The invention relates to a pulse technique and can be used in measuring and computing technology. The aim of the invention is to expand the functionality of the invention by generating data on the relative position of the synchronized and synchronizing pulses. The device for synchronizing pulses contains a trigger 1, a generator of 2 pulses, counters 3 and 4, elements AND 5, 6, 7, 12, generator 10 of single pulses, element OR 11, a counting device 13, input and output buses shown in the drawing. The goal is achieved as a result of the introduction of the counting device, the fourth And element and the three output tires. 1 hp f-ly, 2 ill.

Description

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The invention relates to a pulse technique and can be used in measuring and computing technology.

The purpose of the invention is to expand the functionality by generating data on the relative position of the synchronized and synchronizing pulses,

Fig. 1 shows an electrical block diagram of a device for synchronizing pulses, in Fig. 2 -. electrical structure of the counting device.

The device for synchronizing the pulses contains the trigger 1, the generator 2 pulses, the first and second counters 3 and 4 pulses, the first, second and third elements AND 5-7, the input bus 8, the first output bus 9, the generator 10 single pulses, the element OR 11, the fourth element And 12, the counting device 13 and the second third and fourth output tires 14-16.

The direct and inverse outputs of the trigger 1 are connected to the first inputs of the first and second elements 5 and 6, respectively. The output of the first element 5 is connected to the counting input of the second counter of 4 pulses. The input bus 8 is connected to the second input of the second element I 6, the output of which is connected to the reset input of the first counter of 3 pulses, the counting input of the latter connected to the output of the generator of 2 pulses, and the output connected to the second input of the first element 5 and 7, the output of which is connected to the reset input of the trigger 1; the inverse output of the latter is connected to the reset input of the second counter 4 of pulses, the output of which is connected to the second input of the third element And 7,

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The first output of the generator 10 single pulses is connected to the output of the second element AND 6, the second input is connected to the output of the generator 2 pulses, and the output of the generator 10 single pulses is connected to the first input of the element OR 11, the output of which is connected to the first output bus 9, and the second the input is connected to the first output of the first counter of 3 pulses. The output of the fourth element And 12 is connected to the clock input of the trigger 1.

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Pervp input of the counting device 13 is connected to the direct output of the trigger 1, the second input - with the inverse output | trigger 1, the third input - with the first output of the first counter of 3 pulses, the fourth input - with the input bus, the fifth input is connected to the output of the generator 2 pulses. The first output of the counting device 13 is connected to the third output bus 15, the second output - to the fourth output bus 16, the First and subsequent outputs of the first counter 3 pulses are connected respectively with the first and subsequent inputs of the fourth element And 12.

The counting device contains the first, second, third, fourth and fifth elements And 17-21, the first, second, third and fourth triggers 22-25, the first and second inverters 26 and 27, the delay element 28, the element OR 29 and the pulse counter 30 . The reset input of the first trigger 22 is connected to the output of the first element And 17, the first input of which is connected to the first input of the second element And 18 and the first input of the counting device 13, the second input of which is connected through the delay element 28 to the first input and directly to the second input of the third element And 19. The output of the latter is connected to the reset input of the pulse counter 30 and through the first inverter 26 to the reset input of the second trigger 23, the inverse output of which is connected to the first input of the fourth element I 20 and the first output of the counting device 13, the third input of the latter through the second inverter 27 is connected to the clock input of the third trigger 24, the inverse output of which is connected to the second input of the first element 17, the direct output to the second input of the fourth element 20 and the reset input of the fourth trigger 25. Inverse output the latter is connected to the second input of the second element I 18, the clock input to the fourth input of the counting device 13 and the clock input of the first trigger 22, the direct output of which is connected to the clock input of the second trigger 23 and the first input of the fifth element 21. The second th input of the latter is coupled to a fifth input of the counting device 13 and the third input of the fourth AND gate 20, whose output is connected to the first input of the OR gate 29, second input pos "

next is connected to the output of the first element I 21, the output to the counting input of the pulse counter 30, the outputs of which are connected to the second output of the counting device 13.

The device for synchronizing pulses works as follows.

Counter 3 is serially connected binary decimal counters. From the first outputs of counter 3, pulses are received, the frequency of which is equal to the frequency of pulses arriving at the bus 8. Element 12 performs the function of a decoder. The pulse duration at its output will be determined by the lower bit of the counter 3, which is connected to the first input of the element 12.

With the arrival of each pulse from the output of the element 12 to the clock input of the trigger 1, pulses are generated at its forward and inverse outputs, the duration of which is set by the counter 4 and the frequency of the pulses at the output of the counter 3 connected to the input of the element 5. If the pulse is at the inverse output of the trigger 1 does not overlap the pulse arriving at bus 8, then a pulse appears at the output of element 6 which zeroes the pulse counter 3. The next pulse that arrives at the clock input of trigger 1 is synchronized with the pulse that arrives at bus 8.

Changes in the frequency at the output of counter 3, the connection of the outputs of the bits of counter A to the input of element 7, the connection of the outputs of the bits of counter 3 to the inputs of element 12 make it possible to preset the accuracy of the binding of pulses.

The counting device 13 is designed to accurately determine the relative position of the pulses on the bus 8 and on the first output of the counter 3 at predetermined limits.

If the pulses on the bus 8 are ahead in time the pulses on the first output of the counter 3, then by a positive differential pulse on the bus 8, the trigger 22 is set to one state. The maximum frequency pulses from the generator 2 output through the open element 21 and the element 29 arrive at the counting input of the counter 30. At its outputs, the error code is generated before the negative pulse difference from the first output of the counter 3 arrives. On this front, the trigger 24 is set to one state trigger 22 to zero. O at the direct output of the trigger 22 prohibits the passage of pulses through the element 21, and O at the inverse output of the trigger 23, which is set to one, indicates that

that the pulses on the bus 8 are ahead of the pulses on the first output of the counter 3.

The resetting of the flip-flops 22, 24, 25 occurs by pulses from the direct output of flip-flop 1, and flip-flop 23 and

counter 30 - on the delayed pulse from the inverse output of the trigger 1. This delay is necessary to confidently remove information from the buses 15 and 16 on the positive differential pulse

on the bus 14.

If the pulses on the bus B are lagging in time from the pulses on the first output of counter 3, then by the negative difference of the pulse on the first output

the counter 3, the trigger 24 is set to one. In this case, the possibility of setting the trigger 22 to one state is blocked and the signal O is removed from the reset input of the trigger 25.

The maximum frequency pulses from the output of the generator 2 through open the element 20 and the element 29 is fed to the counting input of the counter 30. On the positive differential pulse on the bus

the trigger 25 is set to one state and the trigger 24 is reset. Further operation of the device 13 is similar to the first case. The signal 1 at the inverse output of the trigger 23 indicates that the pulses on the bus from the pulses at the first output of the counter 3.

Claims (2)

1. Device for synchronizing pulses auth. St. Р 12855В1, which is related to the fact that, in order to expand the functional possibilities by working out the data on the mutual position of synchronized and synchronized pulses, the counting device, the second, third and fourth output buses and the fourth element And, the output of the cat is connected to the counting input of the trigger, the first and subsequent inputs - respectively with the first and subsequent the outputs of the first pulse counter, while the first, second, third, fourth and fifth inputs of the counting device are connected respectively with the direct output of the trigger, with the inverse output of the trigger and the second output bus, with the first output of the first pulse counter, with the input bus and the generator output pulses, the first and second outputs of the counting device are connected respectively to the third and fourth output tires. 2. The device according to claim 1, characterized in that the counting device comprises a first trigger, the reset input of which is connected to the output of the first element I, the first input of which is connected to the first input of the second element And and the first input of the counting device, the second input of which is connected through the delay element with the first input and directly with the second input of the third element And, the output of which is connected to the reset input of the pulse counter and through the first inverter to the reset input of the second trigger, inverse 27 0 five 0 five the output of which is connected to the first input of the fourth element I and to the first output of the counting device, the third input of which through the second inverter is connected to the clock input of the third trigger, the inverse output of which is connected to the second input of the first element And, the direct output to the second input of the fourth element And and the reset input of the fourth trigger, the inverse output of which is connected to the second input of the second element I, the clock input to the fourth input of the counting device and the clock input of the first trigger, the direct output of which En with the clock input of the second trigger and the first input of the fifth element And, the second input of which is connected to the fifth input of the counting device and the third input of the fourth element And, the exit of which is connected to the first input of the element OR, the second input of which is connected to , output - with the counting input of the pulse counter, the outputs of which are connected to the second output of the counting device. I