SU1501163A1 - Associative storage - Google Patents

Abstract

The invention relates to computing and can be used in the recognition and synthesis of signals, in particular, speech, in automated dictionaries for translating from one language to another and vice versa, in reference systems for searching information, and the like. The purpose of the invention is to expand the field of application of the device by providing a search for any word from two arrays stored in the device. The input to the input device of the indicative sequence is recorded in memory block 1. In comparator 5, the sequences read from blocks 1 and 2 of the memory are compared upon receipt of comparison pulses. The generation of comparison pulses by the AND 10 element and the enabling signal by the element 9 Provides triggers 7 and 8. Trigger 7 identifies the sequences read from block 2, i.e. delimits the characteristic and informational sequences, and the trigger 8 records the result of the comparison. The up / down counter 4 and the And 12, 13 elements control the order of reading information from block 3 in accordance with the mode of operation of the device. The device also contains counters 3, element AND 6, element OR 11, group of elements AND 14. The invention provides a comparison of the indicative sequence received at the input of the device with sequences from both the first and second arrays stored in memory block 2 and, accordingly, the search for the desired sequence in both the second and the first arrays. 3 il.

Description

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ABOUT

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these counts are taken from blocks 1 and 2 of memory, by the arrival of comparison pulses. The generation of comparison pulses with the And 10 element and the enabling signal with the And 9 elements is ensured by the triggers 7 and 8. The trigger 7 identifies the sequences counted from block 2, Tov. delimits the characteristic and informational sequences, and the trigger 8 records the result of the comparison. The up / down counter 4 and the And 12, 13 elements control the order of the information to be read.

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The invention relates to an advanced technique, namely to associative storage devices (CAMs), and can be used for recognition and synthesis of signals.

The purpose of the invention is to expand the field of application of the device by providing .CHARGE by any word from two arrays stored in the device.

FIG. 1 shows a structural diagram of an association: a storage device; in fig. 2 - information placement in the first and second memory blocks; in fig. 3 - time diagrams of the device operation.

The device (see Fig. 1) contains the first 1 and second 2 blocks of memory, to the address inputs of which the counter 3 and the reversible counter 4 are connected, respectively,

In memory block 1, an indicative sequence A is written,

 (a, a, b.

The operation of the device, where p and q are variable, will record block 1 in the reverse order, i.e. from the last element ar or b to the first a, or b (see fig. 2a, b), moreover i .1, M, where H is an integer,

In block 2, two arrays of sequences A and B are stored in ,,.,., Bt |, each element of A; array A corresponds to a specific BI sequence; B array and vice versa, to each element of Bi. array B corresponds to the ele

from block 3 in accordance with the mode of operation of the device. The device also contains a counter 3, the element And 6,

the element OR 11, the group of elements AND 14. The invention provides a comparison of the characteristic sequence received at the input of the device with the sequences from the first,

as well as from the second arrays stored in memory block 2, and, accordingly, searching for the desired sequence both in the second and in the first arrays. 3 il.

array of array A. Thus, the data structure in block 2 has the form AB ,,, each element of A, and B; this structure ends with an end sequence code.

The elements of the sequences Aj and B in block 2 are placed as follows: in sequences B with increasing address of the memory cells increases and the sequence number of the elements of the sequence contained in the labels, in sequences Aj, on the contrary, with increasing address decreases the sequence number elements of the sequence (see Fig. 2c).

Comparison of the feature sequence A (or Bj recorded in block 1, with the sequences of array A or B, stored in block 2, occurs in comparator 5.

° and

Dn. Determining the results of the comparison of sequences is the first element AND 6, the output connected to the clock input of the first trigger 7, which is directly connected to the clock input of the second trigger 8 and to the input of the second element AND 9, and inverse to the third element And 10 , the output of which is connected to the control input of the comparator 5, the output of which

 connected to one of the inputs of the element OR 11.

To organize the operation of counter 4 in two modes, serve the fourth 12 and fifth 13 elements I.

The required information is found through a group of elements AND 14 connected to the outputs of block 2,

The device operates in two modes, which are set by applying the corresponding potential signal to the device input mode: mode 1 - search by sign A; Mode 2 - Search by B.

When the device is turned on, the counter 3 is reset.

At the first stage, the characteristic sequence is recorded in block 1. A Record signal is sent to the device, which sets block 1 to write mode, resets counter 4, sets trigger 7 to unit state 1, and trigger 8 via the element OR 11 to O. Record elements of the feature sequence are carried out in the order of arrival of counts. The write cycle ends with writing to block 1

thirty

the code of the end of the sequence (Fig. 3a) .5 from the output of the AND 10 element, which, according to the second stage, compares the characteristic sequence recorded in block 1 with the sequences contained in block 2.

Suppose that as a result of the recording cycle, block 1 contains an indicative sequence Aj.

At the stage of comparison, a reading signal is sent to the device, which sets blocks 1 and 2 into the mode of combining information and permits the passage of pulses. The account for the +1 counting input of counter 4. The sequence elements from Blocks 1 and 2 are combined simultaneously with the arrival of pulses.

counting inputs of counters 3 and 4, I

The initial state of the device on

the comparison stage is the following: counter 4 is cleared and the contents of the zero cell, which is not used for storing sequence elements (Fig. 2c), are read from block 2, triggers 7 and 8 are in 1 and O state respectively, which prohibits the generation of comparison pulses by element And 10 and supplying them to the comparator 5. This state of the device is maintained until, from block 2, the code of the end of the sequence is not readable, with the result that the jgaeT element 6 is reset, which causes the reset of the counter 3 and the switching of the trigger

step in accordance with the Count pulses, provided that the triggers 7 and 8 are in the O and 1 states, respectively. Comparator 5 is triggered by a mismatch, which causes the trigger 8 to be set through the element OR 11 to the state O, which in turn leads to the cessation of the delivery of comparison pulses to the commander 5.

Thus, if a mismatch occurred during the comparison of sequences A and A, the further comparison of the C4nTb BaeNfbK words is terminated. When reading 1: the code of the end of sequence A from block 2, the element AND b is working, which causes reset of counter 3 and switching of trigger 7 to state 1 (FIG. 3b).

45 The information sequence B, read from block 2, in this case does not arrive at the output of the device, since there is no enabling signal at the inputs of the And 14 elements. The readable end of sequence code starts triggering the element 6 and causes reset of the counter 3 and trigger switching 7 to state O, which in turn leads to

55 switching the trigger 8 to the state 1 (Fig. 3g). Thus, counter 3 indicates the zero cell of block 1, containing the last element ar of the indicative sequence

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1 to the state O, which, in turn, switches the trigger 8 to state 1 (Fig. 36).

 As a result, we have the following state of the device: counter 3 is installed on the zero cell of block 1, where the last element ar of the indicative sequence A is recorded.

10 (FIG. 2a), the counter 4 indicates

the cell of block 2, where the last element of the sequence K is stored (see Fig. 2c), the triggers 7 and 8 are in the O and 1 states, respectively, which ensures the comparison pulses with the element 10 And dp of the comparator 5 and the prohibition of production the permissive signal by the element And 9 on the transient information from the device. Therefore, the sequences At are compared first with block 1 and AL. from block 2.

C-alignment of sequences is carried out by the arrival of pulses.

step in accordance with the Count pulses, provided that the triggers 7 and 8 are in the O and 1 states, respectively. Comparator 5 is triggered by a mismatch, which causes the installation of trigger 8 through the element OR 11 to the state O, which in turn leads to the cessation of the delivery of comparison pulses to the comparator 5.

Thus, if a mismatch occurred during the comparison of sequences A and A, further comparison of the C4nTb BaeNfbK words is terminated. When reading1: the code of the end of sequence A from block 2 of the era. the element b bats, which causes reset of the counter 3 and switching of the trigger 7 to the state 1 (Fig. 3b).

Information sequence B, read from block 2 in this case, does not arrive at the output of the device, since there is no permit signal at the inputs of the And 14 elements. The read end code of the sequence causes the And 6 element to be triggered, which leads to resetting the counter 3 and triggering 7 Oh, which in turn leads to

switching trigger 8 to state 1 (Fig. G). Thus, counter 3 indicates the zero cell of block 1, containing the last element ar of the indicative sequence i

A, -, counter 4 - to the cell of block 2, containing the last element of sequence A, and element 10 - is in a state that transmits comparison pulses to comparator 6, and the described process repeats,

After a certain number of repetitions of such comparison procedures, counter 4 indicates the cell of block 2 containing the last element of sequence A.

In this case, the same sequences are compared and the comparator 5 does not generate a mismatch signal. Consequently, trigger 8 remains in state 1, and trigger 7 by the end-of-sequence code AI switches to state 1 (FIG. H). the elements And 14 and the required information sequence is fed to the outputs of the device (fig.Ze),

At this stage, the comparison of the characteristic sequence A-, recorded in block 1, with the sequences of array A, stored in block 2, and the output of the desired sequence BL ends

 The proposed device provides a comparison of characteristic sequences of arbitrary length with sequences from the first or second arrays stored in the device, and in case of a match, the output of the corresponding sequence from the second or first arrays, respectively.

Claims (1)

Invention Formula An associative memory device comprising a first memory block, a comparator, a second memory block, a group of elements AND, a counter, first and second triggers, first to third elements AND, an OR element, and the information inputs of the first memory block are indicative inputs of the device, The input attribute of the first memory block is the write input of the device, the inputs of the read attribute of the first and second memory blocks are combined and are the input of the device, the address inputs of the memory block iepBpro are connected to 0 five 0 five 0 five 0 five 0 five the outputs of the counter bits, the counting input of which is the clock input of the device, the inputs of the first memory block are connected to the inputs of the first comparator group, the outputs of the second memory block, the first inputs of the AND elements of the group and the inputs of the first And element are connected to the inputs of the second comparator group The inputs of the second group of the comparator, the outputs of the elements AND of the group are informational outputs of the device, the control input of the comparator is connected to the output of the third element I, the first and second inputs of which are connected respectively to t an act input of the device and an inverse output of the first trigger, the direct output of which is connected to the synchronization input of the second trigger and the first input of the second element AND whose output is connected to the second inputs of the AND elements of the group, the output of the second trigger AND to the input of the third element And, the output of the first element I is connected to the synchronization input of the first trigger, so that, in order to expand the field of application of the device by providing a search for any word from two in the array device, a reversible counter and the fourth and fifth elements AND are entered into it, and the outputs of the bits of the reversible counter are connected to the address inputs of the second memory block, the addition and subtraction inputs of the reversible counter are connected respectively to the outputs of the fourth and fifth elements AND, per- the input inputs of which are connected to the input of the device, the second inputs of the fourth and fifth elements of AND are connected to the clock input; one device, the third inputs of the fourth and fifth elements of AND are combined and are the input of the device mode, the output of the first element AND is connected to the installation input the counter, the first and second inputs of the OR element are connected respectively to the output of the comparator and the recording entry of the device, the output of the OR element is connected to the installation input of the second trigger, the reset input of the reversing counter and the input SETTING 1 of the first flip-flop connected to the recorder input. but ar About P-1 F five .5a F S FioHLiG code. succession. - .2 pppttp .nn f Qi ztha ripujHCMSou taueSoSa- telyugsha nrnnmn imr innnn tpg (Y;  Sra no not “yes-lRoLmiSHue S) . about dip BC v .H 1GTGTG IGTPPGTG CSP : psdg pp XDO   C and "V / W. e). BtiSoi information shpa-nachionn} t-itHue of the S SAT.