SU1501069A1 - Device for accessing common multimodulator memory - Google Patents

Abstract

The invention relates to computing and can be used in multiprocessor systems with a common multi-module memory. The aim of the invention is to expand the functionality of the device by changing the address of the main memory module to the address of the backup when the main memory module fails. The device for accessing the shared multi-module memory contains a request arbiter, a switch, a group of multiplexers by the number of bits of the address of the memory modules, a group of AND-NOT elements by the number of bits of the substitution code, the AND element, the address decoder and the substitution code decoder. When accessing a failed memory module, the device automatically converts the address of the failed memory module to the backup address, and when formally addressed to the address of the backup module, its address is converted into a substitution code or remains unchanged with a zero substitution code indicating the health of all main modules. 1 ill., 1 tab.

Description

The invention relates to computing and can be used in multiprocessor computing systems with a common multi-module memory.

The purpose of the invention is to expand the functionality of the device by changing the address of the main memory module to the address of the backup when the main memory module fails.

The drawing shows a diagram of the device.:

The device contains the arbiter L requests, the switch 2, the bus 3 logical zero, a group of multiplexers - 4-6 by the number of bits of the module address

memory, address decoder 7, decoder 8 substitution cd, element 9, AND-NOT JO group of elements according to the number of substitution code bits, inputs 11 requests, memory module addresses J2 inputs, inputs 13 replacement code direct values, inputs 14 inverse values of the substitution code, outputs 15 of the inversion signals, outputs 16 of the color signals.

The proposed device performs priority access to the shared memory modules, providing a mode with a sliding redundancy. This means that among the many memory modules, the number

cl

about

3150

which is determined by the magnitude of the module address, is assigned one module as a backup. In the event of failure of one of the main modules, it is automatically (using address translation) replaced by a backup module.

The need for substitution is given by any value of the substitution code, with a non-zero value.

The number of bits of the substitution code is the same as the address of the module; the value of the substitution code indicates the address of the failed module.

In the case of access to the failed module, its address must be converted to the address of the backup. The drawing shows a particular case of the implementation of the transformed address with the substitution, when the number of memory modules is equal. (2 -1), which corresponds to three times the address of the module. The address of the backup module is

111. To implement a spoofing, a decipheror 8 of the spoofing code for eight outputs, three multiplexers, and three elements -AND-NOT with the ele- ment I. was introduced. The rules of substituting (or transforming) addresses are illustrated by the table.

If the substitution code 11 is equal, the address-conversion does not occur, as with a zero value.

0

five

0

five

0

five

0

five

The device works as follows.

When several requests are simultaneously appearing at the inputs 11 of the arbiter 1 requests, the latter issues a response signal to the processor on one of the outputs 16 and opens the switch 2 with the same signal to pass the address required by this processor of the memory module. The address of the module selected by switch 2 goes to the corresponding controls. The multiplexer inputs 4-6. If all bits of the substitution code are zero, the forward outputs of the decoder 8 of the substitution code corresponding to the substitution codes are also in the zero state. These outputs are connected to the information inputs of multiplexers 4-6 in such a way that the outputs of the latter form the address of the required memory module without conversion. The same thing happens if the substitution code is 111. The resulting address (without conversion of the substitution code) goes to the address decoder 7, which generates the address signal on the corresponding code 15. At the same time, the AND 9 element prohibits the passage of the inverse substitution code to the senior information inputs multiplexers 4-6 by locking the elements AND-NOT 10.

At a different value of the substitution code (for example, 001), when accessing the first memory module, the decoder 8 with the corresponding output, the value of which becomes equal to 1, provides the value 1 at the outputs of multiplexers 4 and 5. As a result, the code 111 enters the address of the address decoder 7 and performs It refers to the seventh (backup) module instead of the first module. A similar process occurs when. any other meaningful substitution code. Shaping code generation can be done with one of the central processors ,; on which the functions of the DIAGNOSTICS and the detection of the fact of the failure of the replacement modules are laid out.

The proposed device, when dealing with a substitution, has a symmetry property, because when formally addressing the backup module, the address 111 is converted to the substitution specified in the code. Such a conversion is carried out using the elements AND 9 and AND-NOT 10.

M

/five

Claims (1)

Claim A device for accessing the common multimodular memory, comprising a request arbiter, a switch and a call decoder, the request arbiter output being the output of the device response signals and connected to the control input 15 of the switch, the information input of which is the address input of the device memory modules, the output of the call decoder is the output of the access signals 20 of the device, the inputs of the arbiter of requests are the inputs of the request of the device, characterized in that, in order to expand the functionality of the device By changing the address of the main memory module to the backup address in case of failure of the main memory module, a group of multiplexers, a substitution code decoder, an AND element, and a group of AND-NOT elements are entered into it, and the outputs of the group multiplexers are connected to the inputs of the access decoder, control inputs multiplexers of the group are connected to the outputs of the switch, information inputs from the first to the K-th Pth multiplexer of the group (K = log _z M, where M is the number of memory modules; P = 1, M) are connected to the Pth control input of the group multiplexer, the input of direct values of the substitution code of the device is connected to the input of the decoder of the substitution code, the direct output of which is connected to the information inputs of the group multiplexers, from K to (M-2) - the first, (M-1) -th information inputs of which are connected to the logic zero bus of the device, the inverse outputs of the substitution code decoder are connected to the inputs of the And element, the output of which is connected to the first inputs of the AND elements NOT of the group, the outputs of which are connected to the M information inputs corresponding x multiplexers group inverse input code values spoofing apparatus is connected to the second inputs of AND-NO group.