SU1487189A1 - Functional digital-to-analog converter - Google Patents

Description

The invention relates to the field of automation and computing and can be used to build active

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Digital Controlled Attenuators. The purpose of the invention is to improve the accuracy and resolution. The functional digital-to-analog converter contains the input bus of the code to be converted, η cascades 2.1–2.η attenuation made in the form of t-bit multiplying digital-analog converters, input bus 3 of the input signal, output bus 4 and the input bus 5 of a single potential. The introduction of the correction of higher attenuation cascades improves the accuracy of the conversion, and the use of t-bit multiplying digital-analog converters provides an increase in the resolution of the device. 2 Il. 1 tab.

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The invention relates to automation and computing and can be used to build active zeropressure attenuators.

The purpose of the invention is to improve the accuracy and resolution.

FIG. 1 shows a functional diagram of the device; in fig. 2 - an embodiment of the first and η th decay stages.

The functional digital-to-analog converter (Fig. 1) contains the input control bus 1, η cascades 2.1–2.η attenuation, made in the form of t-bit multiplying digital-analog converters, the input bus 3 of the input signal, the output bus 4 and the input bus 5 of a single potential.

Functional digital-to-analog converter works as follows.

The device consists of η serially connected by an analog signal multiplying t-bit digital-to-analog converters (DAC) 2.1—2. As a result, the conversion coefficient of the input voltage to the input bus 3 is equal to the product of the conversion factors of each multiplying DAC. The first group of digital inputs of the ί-th multiplying DAC is connected to the bus 5 of a single potential equal to the value "1"; The combined inputs of the second group of digital inputs are the input of the разth digit of the control input bus 1, and the combined inputs of the third group of digital inputs of the lower multiplying DAC are used to correct the functional dependence of the output voltage on bus 4 on the code value on the input bus 1 of control.

Under the influence of the control code, the attenuation of each multiplying DAC changes by such a value as to ensure a linear dependence of the attenuation of the output signal, expressed, for example, in decibels. Since the attenuation of each multiplying DAC changes discretely, the resulting attenuation dependence will be different from linear, i.e. there is some systematic error. To compensate for this error, mainly due to the discreteness of the change in attenuation in the higher multiplying DACs, a correction is introduced. Correction is performed by connecting a certain number of digital inputs of the lower multiplying DAC to the inputs of certain high-order control code bits. In the specific instance of the functional digital-analogue converter, in the manner indicated above, the random component of the error, due to the imperfection of the multiplying DAC, can be partially compensated.

four

In this case, the device implements the functional dependence of the output voltage on bus 4 from the control code on the input bus 1 of the control as an exponential function

Yves _N x = and _In ha ' ^lh *,

where Bin is the input voltage on bus 3;

and - the basis of the exponential function;

And - total attenuation of the device; a is a constant determined by the attenuation unit.

The total attenuation of the device A is equal to A = Σ A /;

where A, —— a1о§ _l (\ —- attenuation of the ί-th ^Νθ decay cascade;

Νο = (2 ^t —1) is the total weight of the digits of the multiplying DAC;

Ν _{2 (} = Νο (1 — a ' ^А ^ ·) —the total weight of the controlled bits of the multiplying DAC of the ίth star, the attenuation coefficient;

one; - inverse value of bit coefficients of attenuation cascades, or control code.

At the same time, the remaining control inputs of the multiplying DAC of the ίth digit, the weight of which is equal to ,ι, · — _ο -, are connected to the bus 5 of a single potential.

To compensate for the systematic error of the upper stages of the attenuation of a functional DAC, part of the digital inputs of the lower attenuation stages is used, the total weight of which is N3, is part of Νι, ·. Since the ratios Ν _2ι · «Ν ₀ and Ν ₃ ί« Νο are valid for the younger attenuation stages, the selection from NI is the value of N3; practically does not affect the values of the weights of the lower attenuation stages.

To determine the numbers of the digital inputs of the multiplying DAC, included in the first and second groups of digital inputs, are set by the resolution ό of the functional DAC, i.e. the attenuation of A, the lower-order decay stage, and determine the digit capacity of the multiplying DAC

t> 1n! [1 ^ ₂ (1 + 1 / (1 —a ^- ' ⁵⁷ ' * ² ))] +1, where Ζ = δ / δκΑπ, bidp = —αΙθ £ _α [1 - 1 / (22 '-

1)] —the resolution of the multiplying DAC; ] = 1,2, ..., t - numbers of digital inputs of the multiplying DAC.

Then, using the attenuation values A, known for each stage, · determine the total weight Ν _{2 of the} controlled bits of the ίth multiplying DAC. As implemented

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N21 values are chosen for uncorrectable cascades, the nearest, and for correctable ones, the nearest one to N2 / integer. Then the numbers of digital inputs of the multiplying DAC, included in the second group of digital inputs, are determined from the formula формулы ₂ ί = D 1; 2 ', where 1 / are the bit coefficients of the multiplying DAC.

Digital inputs, bit coefficients, 1 / of which take on single values, are included in the second group of digital inputs. Digital inputs, 1 / of which take zero values, are included in the first group of digital inputs, the total weight of which is Λ [; = Νο — Ι ^ 2ι · At the same time, the systematic error of the ΐ-th attenuation stage Δ, · is equal to Δ, = X, - A, = —α1ο§ _α [(1 - ~) / (1 -

Ix o

Since then, its value is compensated by introducing additional A _a; attenuation to lower attenuation stages, with = - α1ο§ _α (1 — ₃ ί / Νο).

As a concrete example of implementation, the results of the calculation of a functional DAC are given, for which it is assumed: n = 12, rn = 12; N <> = 4095; 0 = 0.01 dB, a = 10, a = 20. From the above results it follows that the maximum error in the entire conversion range does not exceed 0.005 dB (with 1–5, 7, 10, 12 attenuation stages simultaneously turned on) with a resolution not worse than 0,0106 dB.

The implementation of the first and twelfth decay stages in multiplying DACs with corresponding links is shown in FIG. 2. Each attenuation stage consists of a digital-to-analog converter and an output opamp. In the first multiplying DAC, digital inputs 2, 4, 6-12 make up the first group of inputs and are connected to a single potential bus, digital inputs 1 and 3 make up the second group of inputs and are connected to the first bit input of the input bus of the code being converted, and the 5th digital input represents the third group of inputs and is connected to the twelfth bit input of the input bus of the code being converted. In the 12th attenuation stage, the first group of inputs includes 1, 3, 8, and 9 digital inputs, and the second group of inputs — 2.4, - 7, 10, 11, and 12 digital inputs.

Claims (1)

Claim Functional digital-to-analog converter containing input bus 6 unit potential, η of series-connected decay stages, each of which is designed as a multiplying digital-analog converter, the analog input of the first multiplying digital-analog converter is an input bus of the input voltage, the output of the n-th multiplying digital-analog converter is an output bus that is different in that accuracy and resolution, multiplying digital-to-analog converters are made of t-bit, the inputs of the first group of digital inputs of the ίth mind A digital-to-analog converter is connected to a single potential bus, the inputs of the second group of digital inputs of the ΐth multiplying digital-to-analog converter are the ίth digit input of the input bus of the convertible code, the inputs of the third group of digital inputs from the first to kth multiplying digital-analog converters are connected to the corresponding bit, from ηth to 1st, inputs of the input bus of the code being converted, where 1 = 1, 2, ..., k, ..., 1, ..., p; k <p / 2; 1 = n — к-Ц1, and the numbers of the digital inputs of the ΐ-th multiplying digital-to-analog converter included in the second, third and first groups of digital inputs are determined respectively by the formulas Ν ₂ , = ϊηί [Νο (1-3 ~ ^{ΑιΛ <} )] = 2 1/2 '; <N Ν ₃ / = ίπί [Νο (1 — and ^αδιΑ ] = Σ 1, - 2 '; AND Ν-and = Ν _ο —ΝζΓ — Νβ = g ”* - 1, where Ν _ο is the total weight of the digits multiplying the digital-analogue „~ ~ Converter; N1 ;, N2, ·, N3, · is the total weight of the bits included in the first, second and third groups of digital inputs of the ί-th multiplying digital-analog converter, respectively; ί = 1, 2, .... ch; 1y - the value of the bit coefficient multiplying the digital-to-analog converter; A, '- attenuation of the ϊ-th cascade; And _D1 is the attenuation error of the ί th cascade; a - the base of the number system; a is a constant determined by the chosen system of units of attenuation. 1487189 αί $