SU1481755A1 - Random markov process generator - Google Patents

Abstract

The invention relates to automation and computing and can be used to generate input sequences for stochastic control of discrete objects. The purpose of the invention is to simplify the generator. For this, functionally oriented memory blocks are introduced into the generator. The random Markov process generator contains a random number generator, a memory block of pointers of the beginning of lines, a memory block of status codes, a memory block of line elements, control blocks, comparisons, a counter and a register. 2 ill., 4 tab.

Description

The invention relates to the field of automation and computer technology and can be used to generate input sequences for stochastic control of discrete objects.

The purpose of the invention is to simplify the generator.

FIG. 1 shows the generator circuit diagram; in fig. 2 - control unit.

The random Markov process generator contains a block 1 of control, a generator of 2 random numbers, a block of 3 memory pointers-the beginning of lines, a counter 4, a block 5 of memory of status codes, a block 6 of memory of line elements, a block of 7 comparisons, an output register 8 of memory .

The control unit 1 contains a generator of 9 clock pulses, a dynamic D-flip-flop 10, triggered by a falling edge of the clock pulse, an OR 11 element, an inverter 12 and three AND 13-15 elements.

Blocks 3, 5, and 6 of the memory are intended to be stored in the compressed form of the stochastic transition matrix. Information is read from blocks 3, 5 and 6 of memory when the corresponding addresses arrive at their address inputs.

The counter 4 is designed to store and generate an address at which the blocks 5 and 6 of the memory are accessed.

Comparison unit 7 performs a comparison of the numbers received from the random number generator 2 and from the unit 6 of the memory of line elements, generating the feature "sЈC or".

The output memory register 8 is designed to store the current state of the circuit.

The generator works as follows.

Let a Markov process be given, described by a finite set of states

00

 ate

sd

,, n-1 and the stochastic transition matrix, ||, where P, k is the transition probability per clock cycle from the state

3 ...

s, state i, n-I; a, -2, an, is a whole.

Stochastic matrix P stored compressed in the form of vectors

.e ||,, ns;

RHISJI;

, ll, dn2,

where d is the degree of bitness of the matrix P. The coordinate q of the vector Q contains the total number of nonzero elements of the rows Yu of the generator 2 random numbers. On the back

At the initial moment of time, before the arrival of the first clock signal from the 9 clock pulse generator / generator, the dynamic D-trigger 10 is in the zero state for definiteness.

The first clock signal from the generator 9 clock pulses through the element And is fed to the control input

matrices P preceding row 1, i.e.

qi N0;

 + Ni;

qn i q; i21r: M "-2,

where NO, NI, ..., is the number of nonzero elements of the rows 0,1, ..., n-2 of the matrix P.

We turn from the stochastic matrix P to the matrix P,

H) if P, 0; where P lk -k20

EP, Y, if P, Ј0.

Vectors R and T are obtained as follows.

From the matrix P, non-zero elements P, A are written line by line into the vector R; in the vector T, the indices of the columns of nonzero elements.

The vector Q is loaded into the block 3 of the line start pointers containing n cells of Iog2 dn2.

The vector R is loaded into the memory block 6, the line elements containing dn2 cells of the size of t, and the trigger 10 is switched to the one state in the memory of the clock signal front.

After starting, according to the signal from control unit 1, sensor 2 evenly distributed on a segment (0.1) of random numbers generates an m-bit binary number and a value x. served on the second group of inputs of the comparator block 7. Comparison unit 7 can generate the sign "(the number from the generator 2 random numbers is less than or equal to the number received from the block 6 of the memory of line elements) or the sign" (the number from the generator 2 random numbers is greater than the number received from the block 6 of the these line items).

If the sign "is generated, the next clock pulse of the generator 9 through the element And 13 enters the counting input of the counter 4 and increases its content by one.

As a result of changing the contents of counter 4, the memory blocks 5 and 6 are simultaneously triggered: the next sign of the next group of inputs of the comparison unit 7 is transferred

2 random number generator. On the back

This completes the process of loading the source data.

At the initial moment of time, before the arrival of the first clock signal from the 9 clock pulse generator / generator, the dynamic D-trigger 10 is in the zero state for definiteness.

The first clock signal from the generator 9 clock pulses through the element And is fed to the control input

2 random number generator. On the back

0

the clock edge of the trigger signal 10 is switched to one state.

After starting on a signal from control unit 1, sensor 2 evenly distributed random numbers on the interval (0.1) produces an m-bit binary number and a value x. served on the second group of inputs of the comparator block 7. Comparison unit 7 can generate the sign "(the number from the generator 2 random numbers is less than or equal to the number received from the block 6 of the memory of line elements) or the sign" (the number from the generator 2 random numbers is greater than the number received from the block 6 of the these line items).

If the sign "is generated, the next clock pulse of the generator 9 through the element And 13 enters the counting input of the counter 4 and increases its content by one.

As a result of changing the contents of counter 4, memory blocks 5 and 6 are simultaneously triggered: the next group of inputs of the comparison unit 7 receives the next 0

There are only numerators of a, fractions of the form P, c4.2-.

40

a nonzero element of row a of matrix P; To the inputs of the memory block 3, the post-vector T is loaded into the memory block 5 of the memory 35 C Д D of a possible future state 5c. state codes containing dn2 cells once-again, unit 7 of the comparison is triggered.

If the comparison unit 7 again generates the feature ", the process of incrementing the counter 4 and reading the blocks 5 and memory 6 is repeated, the block 7 is again activated, etc.

If the symptom is generated, the next clock pulse of the generator 9 through the element 15 is fed to the input of the record of the memory register 8 and fixes in it the code of the next state sfe. The same clock pulse arrives at the installation input of counter 4 and fixes the index of the first nonzero element of the matrix P of the row w, which by this time is on the outputs of block 3 of the memory of the line start pointers.

At the same time, at the falling edge of the same clock pulse, the dynamic D-trigger 10 is switched to zero (the initial state, because the inverted value of the reference feature is supplied to the D-trigger input through the inverter 12 and the OR 11 element.

The cycle of generation of the next state of the circuit is completed.

45

A number of Iog2n. For example, for matrix P from table. 1 matrix P has the form presented in table. 2

Vector Q is presented in Table. 3, and the vectors R and T - in Table. four.

Before starting work, Q, R, T are calculated and loaded into the corresponding blocks 3, 5 and 6 of memory (in Fig. 1, the loading device is not shown).

The initial state of the Sf circuit is set as follows.

The output register 8 of the memory loads the state code f / s /. In the counter 4 load the coordinate q / BeKTOpaQ (in Fig. 1 loading devices are not shown). At the same time, at the outputs of block 6 of the memory of the elements of rows 0, a coordinate appears, i.e. the first non-zero element of row f of the matrix P which is fed to the first group of inputs of the comparison block 7. At the same time, a possible future state code appears at the outputs of block 5 of the memory of status codes - 55 nor sa (), and at the outputs of block 3 of memory of the starting lines it indicates the index of the first nonzero row element a of matrix P

With the arrival of the next clock pulse, trigger 10 again switches to

The cycle of generation of the next state of the circuit is completed.

With the arrival of the next clock pulse, trigger 10 again switches to

a single state, a start signal is generated for a generator of 2 random numbers, etc. Thus, by comparing the numbers coming from generator 2 with non-zero elements of the matrix P, a random Markov process is simulated.

Claims (1)

Invention Formula A random Markov process generator, comprising a register, a controlled random number generator, a control unit, the first output of which is connected to the write register of the memory register, and the second output is connected to the triggering input of a controlled random number generator, in order to simplify , it contains a memory block of line start pointers, a state codes memory block, a string element memory block, a counter, a binary number comparison block, the output of which is connected to the trigger input of the control unit, the third output Oh oh 64 ABOUT 651 T024 ABOUT ABOUT J9 32 o About About About About 13 32 o Oh oh which is connected to the counter input of the counter, the installation input of which is connected to the fourth output of the control unit, the bit outputs of the counter are connected to the corresponding address inputs of the memory of status codes and the address inputs of the memory of line elements, information outputs of which are connected to the first group of corresponding information the inputs of the comparison unit, the second group of information inputs of which are connected to the corresponding information outputs of the controlled random number generator, inform insulation unit outputs code memory states are connected to corresponding data inputs of the register and the address input unit memory pointers beginning lines, information outputs of which are connected to the respective information inputs of the counter L, BL information register moves are the information outputs of a random Markov process generator. Table 1 3 24 3 6 ABOUT oh oh 512 ABOUT ABOUT 1013 1024 o 1007 1024 o About 93 256 O Ii 64 ABOUT 373 1024 ABOUT About About About About About About About 17 131 1024 o ABOUT About 651 Oh oh 1024 GS 1024,175 o 1024 GS Oh oh 45 64 About 11 1024 o ABOUT 12. 32 LTD O 1 o about about About 1 4 5 R 131 1024 651 1024 17 1024 175 1024 608 1024 652 1024 11 1024 720 1024 T14 27 06 05 23 46 15 06 table 2 O O O 1 O O 1 O About About 1 Oh oh one about 1 About 1 About About About About Tables 3 Table 4 10 11 12 13 14 15 0U8. 2