SU1478307A1 - Pseudo random number generator - Google Patents

Abstract

The invention relates to a pulse technique. The purpose of the invention is to increase the reliability of the generator. The pseudo-random number generator contains a pseudo-random sequence generator 1, malfunctions in which are detected by the control circuit, the initial states of the trigger 2 and the pulse counter 5 of which are set together with the initial state of the pseudo-random sequence generator 1. The drawing shows the adder 3 modulo two, the element OR 4. 1 Cp. f-ly, 2 ill.

Description

TI

one

i

P

4b 1

00

with

1

The invention relates to a pulse technique and can be used in computing.

The aim of the invention is to increase the reliability of the device.

FIG. 1 shows a block diagram of a pseudo-random number generator; in fig. 2 is a pseudo-random sequence generator circuit.

The pseudo-random number generator (Fig. 1) contains a series-connected pseudo-random sequence generator 1, trigger 2, adder 3 modulo two, the element OR 4,

a pulse counter 5, a counting input for changing information value per iterator is connected to a synchronization input of a pseudo-random sequence generator 1, a clock bus and a trigger input of trigger 2, the installation input of which is connected to an input of a pseudorandom sequence generator 1 and a second input element OR 4. Output Generation

20

during generator 1 pseudo-random sequence. In order to count the number of the following subsets of zeros or ones from the device output, the output of the adder 3 modulo two must be

 O1

which allows the counter of 5 pulses to count the number of cycles in a series of signals of the same value (say, O) on the alternator of generator 1 of the torus 1 pseudo-random sequence - 5 pseudo-random sequence, connected to the second input of the sum- Such an operating mode of the counter 5 of the unit 3 modulo two. printing with equal signals

The pseudo-random generator 1 after the two inputs of the adder 3 modulo-sequence (Fig. 2) contains a group of 6 elements AND 6.1-6.2p, a group of 7 30 elements NOT 7.1-7.P, a shift register 8 with an adder 9 modulo two in the circuit feedback. The first inputs of even elements And a group of 6 elements And

are the inputs of the generator 1 pseudo-35 zero state. This same (one-random sequence and soy) signal from the output of the generator 1

two. When the value of the signal at the output of the generator 1 of a pseudo-random sequence (say, from 0 to 1) changes modulo two at the output of module 2, a single signal arises and resets the counter of 5 pulses to

dineny with the inputs of the corresponding elements NOT 7.1-7.p group, the outputs of the elements NOT 7.1-7.P which is connected to the first inputs of the corresponding odd elements AND group b elements And the outputs of odd elements And which are connected to the first group of the installation inputs of the shift register 8, the second group of installation inputs of which are connected to the outputs of the corresponding even-numbered elements And groups 6 of the elements And, the second inputs of the elements And of which are interconnected and the input of the installation of the generator 1 of a pseudo-random sequence, the input is synchronous which is connected to the synchronization input of the shift register 8.

The generator works as follows.

In the initial position, the pseudo-random sequence generator 1 is driven in parallel

carrying information, in which the initial number, permanently input to the inputs of the parallel recording, is recorded in its shift register 8; prohibited in

Only the 00 ... O register of the 8 shift register is set. To perform this operation, a signal is provided on the device setup bus. The same signal clears trigger 2 and, through the OR element 4, the counter 5 pulses is set to the zero state. The trigger 2 and modulator adder 3 modulo reset the counter of 5 pulses to the zero state at

during generator 1 pseudo-random sequence. In order to count the number of the following subsets of zeros or ones from the device output, the output of the adder 3 modulo two must be

 O1

which allows the counter 5 to name both inputs of the adder 3 modulo

two. When the value of the signal at the output of the generator 1 of a pseudo-random sequence (say, from 0 to 1) changes modulo two at the output of module 2, a single signal arises and resets the counter of 5 pulses to

0

a pseudo-random sequence arrives at the input of trigger 2 and the front of the next clock pulse is transmitted to the output of trigger 2, again restoring modulo two signal O at the output of modulator 3, allowing the pulse counter B to start counting the number of next different signals of another value (say 1) a series of signals from the generator output 1 pseudo-random sequence. The operation of the pulse counter 5 continues until the next signal change at the output of the pseudo-random sequence generator 1.

The occurrence of a malfunction in the pseudo-random sequence generator 1 causes one or

Since several triggers of its shift register 8 are constantly in the same (zero or one) states. Successively shift, this state is not later than

0

n-1 clock time appears at the output of pseudo-random sequence generator 1. After n + 1 clock cycle, the device issues a 5-pulse signal from the output of the counter of 5 pulses.

147

Claims (2)

1. A pseudo-random number generator, containing a pseudo-random sequence generator, serially connected trigger, modulo two adder, the OR element and a pulse counter, the counting input of which is connected to the clock bus, the initial installation bus connected to the second input of the OR element and the setting input of the pseudo generator connected to the clock bus, the trigger setup input is connected to the initial setup bus. 2. The generator according to claim 1, wherein the pseudo-random sequence generator C holds a shift register with a modulo two adder in the feedback circuit, 10, the group of elements is NOT and the group of elements is And, the first inputs of even elements And which are the inputs of a pseudo-random sequence generator and are connected to the inputs of the corresponding 15 elements of the NOT group, the outputs of the elements of which are connected to the first inputs of the corresponding odd elements AND groups, the outputs of the odd elements and which are connected to the first  .i V.- j. vg. wri .., PS software | „I IC | J Pre-random sequence, output 20 by a group of setup inputs of the register which is connected to the second input of the modulo two adder, the clock pulse bus is connected to the synchronization input of the pseudo-random sequence generator, characterized in that, in order to increase the shift, the second group of the installation inputs of which are connected to the outputs of the corresponding even elements And the group of elements And, the second inputs of the 25 cops and which are interconnected and the generator installation input shift, the second group of installation inputs of which are connected to the outputs of the corresponding even-numbered elements And a group of elements And, the second inputs of the elements 25 And And which are interconnected and the input of the generator installation The reliability of the device, the output of the pseudo-random sequence of the pseudo-random sequence rator, the synchronization input of which is connected to the information input of the synchronization input of the trigger house, the synchronization input of the 3d shift. parallel entry inputs Installation T & L00 SCHYuOSH 1 shchshm 1478307 Pogo connected to the bus clock pulses, the trigger installation input connected to the bus initial installation. 2. The generator of claim 1, wherein the pseudo-random sequence generator comprises a shift register with a modulo two adder in the feedback circuit, 10, the group of elements is NOT and the group of elements is And, the first inputs of even elements And which are the inputs of a pseudo-random sequence generator and are connected to the inputs of the corresponding 15 elements of the NOT group whose outputs are NOT connected to the first inputs of the corresponding odd elements AND group, the outputs of the odd elements And which are connected to the first  .i V.- j. vg. wri .., PS software | „I IC | J 20 groups of setup inputs of the register shift, the second group of the installation inputs of which are connected to the outputs of the corresponding even-numbered elements And a group of elements And, the second inputs of the elements And of which are interconnected and the input of the generator installation a pseudo-random sequence whose synchronization input is connected to the synchronization input of the shift register.