SU1471149A1 - Digital phase-meter - Google Patents

Abstract

The invention relates to a phase-measuring technique and can be used in measuring the phase-frequency characteristics of radio devices. The purpose of the invention is to increase accuracy and speed. In a two-channel frequency converter 1, the phase shift under investigation is transferred to a fixed intermediate frequency. The phase shift is measured in coarse and accurate phase shift measurement paths. The coarse measurement path contains a phase-code converter 5, a time master unit 9, a pulse counter 13, information registers 11.15, a pulse shaper 23. An accurate measurement path contains a two-channel frequency multiplier 7, a two-channel phase-shift multiplier 4, a phase converter - code 6, time driver unit 10, pulse counter 14, information registers 12,16, pulse generator 24. The measurement paths and measurement information are monitored and processed by the microcomputer 17 connected to the paths through the control register 22, the bus driver 21 and the address selector 26. The goal has been achieved by executing coarse and accurate measurement paths and interfacing them with the microcomputer. DRAWING 2,3,25 - DEVICES INPUTS, 18 - CONTROL PANEL, 19 - INFORMATION DISPLAY UNIT, 20 - CENTRAL MICROPROCESSOR BLOCK. 2 IL.

Description

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Claims (1)

Formula a of the invention “A digital phase meter containing a two-channel frequency converter, the two signal inputs of which are information inputs of the device, a coarse change path and a phase shift accurate measurement path, including a two-channel phase shift multiplier, characterized in that, with the aim of increasing accuracy and speed, a frequency synthesizer, a microcomputer, an address selector, a bus driver and a control register are entered into it, and a phase converter is entered into the coarse measurement path - a time-setting code lock, two information registers, a pulse counter and a pulse shaper, a two-channel multiplier> frequencies, a phase code converter, a timing unit, two information registers, a pulse counter and a pulse shaper are introduced into the path of accurate measurement, and the outputs of the two-channel frequency converter are connected to two information inputs of the converter phase - a rough measurement path code and two inputs of a two-channel frequency multiplier, the outputs of which are connected to two signal inputs of a two-channel mind a phase shifter, the outputs of which are connected to two information inputs of the phase converter — an accurate measurement path code, and the heterodyne input is connected to the first output of the frequency synthesizer, whose input is connected to one of two outputs of the two-channel frequency converter, whose heterodyne input is connected to the second output of the synthesizer frequency, the third and fourth outputs of which are connected to the inputs of the quantizing frequency of the phase - phase converters - code, the gate inputs of which are connected to the first control outputs with sponding blocks of timing and times 1471149 ¹⁴ through the information registers with the system line of the microcomputer, and the overflow outputs are connected to the counting inputs of the corresponding pulse counters, the bit outputs of which are connected respectively through the second information registers with the system line of the microcomputer, which is connected via the system line to the recording and preset inputs of the timing units, selector inputs addresses, outputs of the bus driver and to the information inputs and the input of the recording of the control register, the control input of which is connected n with the output of the address selector, and its outputs are connected: the first, second, third, fourth and fifth to the control inputs of the corresponding information registers and the bus driver, the sixth to the enable inputs, and the seventh to the control inputs of the timing blocks, the third control outputs of which connected to the inputs of recording information registers, in addition, the first input of the bus driver is the synchronization input of the device, and the second and third inputs are connected respectively to the control outputs of the first information registers, as well as to the first inputs of the pulse shapers, the outputs of which the critical inputs are connected to the second control outputs of the corresponding time-setting units, the counting inputs of which are connected to the control outputs of the respective phase-to-code converters, the information outputs of which are connected respectively __ are connected to the reset inputs of the converters and phase - code, pulse counters and second inputs are connected to the reset inputs of the control register, time-setting blocks and to the system magic M. .