SU1471148A1 - Digital phase-frequency meter - Google Patents

Abstract

The invention relates to information conversion and measurement technology and can be used in the creation of combined measuring devices and functional transducers for the simultaneous measurement of the period, time shift, frequency and phase difference of periodic signals. The period and time offset are measured by filling the corresponding time intervals with the clock frequency of the reference oscillator. The resulting digital codes are entered into registers and converted by a counter, accumulating adder and adder to frequency codes and phase difference. The increase in speed is achieved by cycling the device at the clock frequency of the reference oscillator. 2 Il.

Description

one- - .

The invention relates to information conversion and measurement technology and can be used to create combined measuring devices and functional transducers, for simultaneous measurement of the period, time shift, frequency, and phase difference of periodic signals.

The purpose of the invention is to increase speed.

Figure 1 shows the functional diagram of the digital phase meter-frequency meter; 2 shows timing diagrams for his work.

Phase meter-frequency meter consists of a meter 1 time intervals, containing counter 2, registers 3 and 4, shaper 5 pulses and triggers 6 and 7, accumulating adder 8, containing looped in adder 9 and. register 10, generator /

11 clock frequency, prohibition element 12, coincidence element 13, block of inverters 14, adder 15, counter 16 and registers 17 and 18,

The measuring and reference inputs of the meter 1 are connected to the sources of the measured and reference signals, respectively, and the clock input to the output of the generator 11, which is also connected via element 12 C. To the synchronization input of the adder 8 and the counting input of the counter 16, the period output of the meter 1 is connected to the information input of the adder 8, the output of the shift through the block 14 to the first input of the adder 15, and the output of the installation through the match element 13 to the inputs of the installation of the counter 16 and the adder 8, whose information output is connected to the second input ummatora 15 and the carry output - to ban prohibits the entry 12, a second member

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 match element 13 and the synchronization input of register 17, whose information input is connected to the output of counter-16 and information input of register 18, the synchronization input connected to the transfer output of adder 15, and the outputs of registers 17 and 18 are outputs of a phase meter-frequency meter , by frequency Q and phase difference, respectively, while the counting input of counter 2 and the synchronization inputs of the trigger 6 and 7 are connected to the clock input of the meter 1, and the information inputs of the trigger are 6 and 7 to the measuring and reference inputs, respectively, the output trigger 6 is connected via the driver 5 to the output of the meter 1 installation and to the installation input of the counter 2 and directly to the synchronization input of the register 3, which is connected to the period output of the measurement meter 1, and the information input to the output of the counter 2 and information input 25 register 4, connected by the synchronization input to the trigger output 7, and output to the shift output, measuring 1,

In Figures 1 and 2, the following ЗО conventions are accepted: U is the measured signal. Up is the reference signal, U g is the signal at the output of the generator 11, N, is the code at the output of counter 2, N is the code

35

on the information output of the adder 8, Nj is the code at the output of the counter 16, P, - -. The transfer signal of the adder 8, the transfer signal of the adder 15, the period code at the output of the register 3, N / 1 - the code of the time shift between the ships

signals UK and Up at the output of the register 4, Nf - frequency code at the output of the register 17, N Lf code of the phase shift at the output of the register 18, Up- signal at the output of the driver 5.45

Digital phase ME 7p frequency counter works as follows.

First consider the process of measuring the period T of the signal U and its time shift-C relative to the signal and. The measurement is made by filling these time intervals with stable frequency pulses f. When a front edge of the signal U arrives at the input of the meter 1, - and the output of the generator 5 produces a narrow pulse U (p, setting: counter 2 to the zero state 0. After that, the output is

Chica 2 is formed linearly increasing code.

N Gn p

(one)

After the arrival of the leading edge of the signal ir at the output of the trigger 7, a positive differential is formed, recording in register 4 the number Nj, equal to the number n of generator pulses 11, passed to the input of counter 2 in time

S -11-, f 1.

(2)

After the arrival of the leading edge of the signal and at the output of flip-flop 6, a positive differential is formed, recording the number NT in the register 3 equal to the number of n-p. generator pulses 11, passed to the input of counter 2 during time T

NT N, nJ Fri Tf, (3)

At the same time, the next impulse Up is formed at the output of the former 5, the counter 2 is zeroed, and the operation cycle of the meter 1 is repeated.

Impulse installation U.p, passage through the element. 13 matches, by setting, the counter 16 and the adder 8 are brought to the zero state. In this case, the transfer signals are removed: P, O and RK 0 "This prevents the passage of the signal U p through the match element 13 and the passage of pulses Ur through the prohibition element 12 the synchronization input of the adder 8 and the counting input of the counter 16. At the output of the counter 16, a linearly increasing code is formed

Njtn p.

(four)

and at the output of the adder 8

  nn. (five)

X) After passing through the prohibition element 12 a certain number of pulses Pu at the output of the adder 15, the transfer signal P 1 appears. The number nc: can be determined from the relation

N and Equality (5)

(6)

„L; -w N1

n, 2 - ;.

2 coefficient due to the shift of the discharge grid between the input and output of the adder 8;

m is the bit of the bits of the input and output codes of the adder 8;

k. is the number of bits of the adder 8 (the input code is fed to the lower bits of the adder 8).

The positive differential arising from the transfer output of the adder 15, registers in the register 18 code

N, f NzSp 2

NT NT

Substituting in (7) the values of N j and N from expressions (2) and (3) are

„G, k-fn -„ / оСЧ NU) 2 t 2 M (2ii),

 G where ss 2 fi- - phase shift,

By the time of the transfer signal P to 1 at the output of the adder 8, the number of pulses P passes through the prohibition element 12, which is determined by the condition of the transfer P

(9)

NiCnjl 2

and equality (5) in the following form

f N / a in view of (3)

(ten)

2 2

About f;

(P)

where f T is the frequency of the U signal.

A positive differential at the output of the transfer of the adder 8 writes in the register 17 code

NP P | - f. (12) It should be noted that the code setting time at the output of counter 16 must be less than the delay in the transfer signal at the outputs of adders 9 and 15 in order to avoid writing false code values in registers 17 and 18. This condition is easy to fulfill, since the transfer delay is made up of the delays introduced by the register 10 and the adders 9 and 15 themselves, and the settling time is determined only by the delay in the meter 16 itself. transfer amounts Ator 8 and adder 15 must include additional delaying elements.

 ,

After the transfer signal appears, the passage of the pulses Up through the prohibition element 12 is stopped, and a signal is given to the matching element 13

 allowing the passage through it of the installation.

After the arrival of the next U signal edge, the process of obtaining codes

Q N. from N-j codes. and N is repeated. Pulses of the Up setting, coming during the conversion process, are blocked by the P to O signal and do not disrupt the process.

. | c Thus, at the outputs of the phase meter-frequency meter, codes of the period, time shift, frequency and phase difference are formed. For the measurement process, supplying the device to the input is sufficient.

20 one period of the measured signal. The time of one measurement cycle is equal to the sum of the duration of the period of the measured signal and the time for converting the NT code to code N

25, 2

t, T + n, - T + 1-. (13) -1 - 1

For example, when measuring the parameters of the signal frequency f 10 Hz with an accuracy of 30 0.1 it is necessary to have m 10, k 20, f, 10 kHz, then

t. 0.1 0.2 s,

those. 35 times faster than the known device.

Claims (1)

Invention Formula 40. Digital phase meter-frequency meter, containing a clock frequency generator connected to the input of the first counter, a trigger, the first input of which is connected to the reference source 45 signal, the second counter, the output of which is connected to the input of the first register, characterized in that, in order to improve speed, the second trigger is entered into it, 50 second, third and fourth registers pulse shaper, accumulator -nvdium adder, adder, inverter unit, coincidence element, and prohibition element, which allows input eg is connected to the clock frequency generator output, the synchronization inputs of the first and second triggers, and the counting input of the first counter, prohibiting the input — to the first input of the coincidence element, the high-carry transfer output of the accumulating adder and the synchronization input of the first register, and the output — to the counting input of the second the counter and the synchronization input of the accumulating adder, the installation input of which is connected to the installation input of the second counter and the output of the match element, the information input to the output of the second register, and The output output is connected to the first input of the adder, the second input of which is in turn connected via - a block of inverters to the output of the third register, and the output directly to the synchronization input of the fourth register, whose information input is connected to the information input of the first register, in addition to the installation input. the first counter is connected to the output of the pulse former and the second input of the coincidence element, and the output to the information inputs of the second and third registers; the synchronization input of the second register is connected to the input of The pulse changer and the output, the second trigger, and the third register to the output of the first trigger, the information input, the second trigger, is connected to the source of the measured signal, and the outputs. The first, second, third, and fourth registers are outputs of a phase meter-chotometer, Ux FIG. I