SU1462391A1 - Information transmitting device - Google Patents

Abstract

The invention relates to information measuring technique and can be used in telemetry systems. The device polls telemetry parameters and the integral accumulation of these parameters. By using bitwise parameter processing, the information content of the device is improved. The device comprises a counter I, a switch 2, a data compression node 3, including a threshold element 4, a trigger 5, an AND 6 element, a memory block 7, and: re-. a resistor 8, an adder 10 modulo two, a synchronization unit 13, a trigger 12, an AI element, a memory unit 9, and a single potential bus 4. 3 il. c% b (L

Description

FIG. /

The invention relates to information-measuring technology and can be used in telemetry systems for accumulating integral values of measured parameters.

The purpose of the invention is to understand the information content of the device.

FIG. 1 is a block diagram of the deviceJ in FIG. 2 - functional block diagram; in fig. 3 - time diagrams i, explaining the operation of the synchronization unit.

I device for transmitting information; contains 1, switch 2, node 3 data compression performed on the threshold element 4, the first trigger 5, the first element AND 6, the first memory block 7 and the limiting element (resistor) 8, the second I block 9 memory ti, adder 10 modulo two, the second element And 11, wto; swarm trigger 12, synchronization block 13, unit potential bus 14, clock 15 and control 16 inputs I and the first 17 - seventh 23 outputs of synchronization block 13.

The synchronization unit 13 contains the elements 24 and 25, the element 26 of the test, the third 27-29, the element 30 of unequalities, the element 31 of the delay elements AND-HE 32 and 33, the elements AND; 34 and 35 and the element AND-NOT 36. I The device works as follows:

The information inputs of the device receive signals from sensors with discrete levels O and 1. For each information input in memory block 9, the value of the measured parameter is stored, which increases by one if the input signal has an O change in 1.

At the clock input of the device to the block 13, the synchronization receives a pulse sequence, which causes the appearance at the outputs of the control signals in accordance with the timing diagram in FIG. 3. Pulses from output 18 of block 13 are postulated (sent to the counting input of counter 1, the high-order outputs of which are connected to the address inputs of the switch 3. The high-order bits of counter 1 also specify the cell address in memory block 7, which stores the previous value of the polled channel .

623912

At each polling cycle, node 3 data compression generates a pulse at the output of the element And 6, if

5 to the previous polling cycle at this input, a change in the signal O and 1, This pulse sets to 1 trigger 12.

In the polling cycle of each information input device at the output of memory block 9, the binary code of the measured parameter of the polled channel is generated starting from the low-order bit. Cell addresses

15 of the memory block 9 for each bit of the parameter being measured are set using the lower order of the counter 1. To increase the value of the measured parameter by one, the circuit

20 containing adder 10, trigger 12 and element 11. Trigger 12 fix5

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It changes the input state, and also serves to generate the transfer signal to the next bit. The new value of each bit of the measured parameter from the output of the adder IO is written to the cell of block 9 at the same address. If a transfer occurs to the next bit from And 11, the cocked state of trigger 12 is confirmed. The contents of block 9 can be read from the output of the device simultaneously with the increment of the parameter or at some other time.

The data compression node 3 operates in accordance with the following truth table:

As follows from the table, the signal at the output of node 3 occurs when

changing the signal from state 0 to state 1. In the case when the signal from the output of switch 2 is at level O or 1, a new state of the polled input is recorded in the corresponding cell of block 7. If the signal received from the output of switch 2 is corrupted by interference and has an intermediate value between O and 1, the previous value is stored in the corresponding cell of memory block 7. In this case, the first input of the threshold element 4 through a resistor 8 is a high level signal corresponding to 1. The output state of the threshold element 4 is determined by the state of its second input. The previous state of the polled input of the device is again recorded in the corresponding cell of block 7. The magnitude of the resistor 8 is determined by the element base used and the specified noise immunity. As a threshold element 4, a Schidt trigger with an AND input element is applied. The synchronization unit 13 provides for the generation of control signals in accordance with the timing diagram of FIG. 3. At the output of block 13, the following signals act: 18-1 - counting pulses 18-2 - the signal for the resolution of the account-, 17 - the write and read gates of the memory block 7; 19 - strobe-trigger 5; 20 - pulse reset trigger 5; 22 — read (write) signal of blocks 7 and 9 of memory, 21 — write and read gates of block 9 of memory; 23 - the strobe trigger 12.

 The device is implemented on the following elements: counter 1 - K561IE10 memory block 7 and 9 - K561RU2, threshold element 4 - K561TL1, switch 2 - K561KP2, adder 10 - K561LP2. The U-81 block, which is part of the UHF-UN telemechanical complex, is taken as the base object. Block U-81 uses a summing counter for each channel and provides polling for four input channels. The developed block U-90, in which the proposed device is implemented on the same design (one TCA), allows 64 input channels to be polled. With an average number of channels per device of complex 64, one board of the U-90 unit allows

Ju 15 20 40

2391

replace 8 U-81 boards. Thus, the device provides in comparison with the base object a reduction in the amount of equipment due to the use of bitwise processing of the measured parameter, an increase in the information content of the device.

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Claims (1)

Invention Formula A device for transmitting information containing a switch, the information inputs of which are the information inputs of the device, a synchronization unit, the first output of which is connected to the first control input of the first memory block, the second memory block, a single potential bus and a threshold element the fact that, in order to increase the information content of the device, a counter, triggers, a restriction element, And elements and an adder, the outputs of the first group of the counter are connected to the corresponding first address in By the signals of the second memory block and the address inputs of the memory block and the switch, the switch output is connected to the first input of the threshold element and the first input of the restricting element, whose output is connected to the unit potential bus, the output of the threshold element is connected to the information input of the first trigger, the output of which is connected to the first input of the first element AND and the information input of the first memory block, the output of which is connected to the second inputs of the threshold element and the first element AND whose output is connected to installation in 1 of the second trigger, the output of which is connected to the first inputs of the adder and the second element And, the output of the second element And is connected to the information input of the second trigger, the outputs of the second group of the counter are connected to the corresponding second address inputs of the second memory block, the control input of the synchronization block connected to one of the outputs of the second group of the counter, the clock input of the synchronization unit is the clock input of the device, the second - seventh outputs of the synchronization unit are connected respectively to the input of the first trigger input and the third 15 7 / ig.2 15 12516 1 g G "-; PG1GiT. .TnTLTLT 22 JlJTJTr ... JTJT-n-rL. sixteen 17 20 19 18g  -1L-PG 21 LLLLLG ... TSH ShPLPL. iik / u / 7rosa one vkodd ... tgg