SU1438005A1 - Binary code to position-sign code converter - Google Patents

Abstract

The invention relates to the field of computer technology and can be used in the construction of arithmetic devices for translating binary code into position-sign, in which each group of unit bits of binary code is represented by the difference of two bordering units. The aim of the invention is to enhance the functionality by providing performance monitoring without special control codes and generating a code with the same number of significant positive and negative bits. The goal is achieved by the fact that the group of elements OR-NOT 13-18 is additionally introduced into the binary-to-binary-positional code converter containing the group of elements AND 1-6, the group of elements NOT 7-12. 1 il. (O (L 4 CO 00 / (+) ate

Description

11438005

The invention relates to a computational technique and can be used in the construction of arithmetic devices for converting a binary code into a positional 7-envelope, in which each group of single bits of a binary code is represented by the difference of two bordering bits.

The purpose of the invention is to expand the functional capabilities by providing performance monitoring without special control codes and generating a code with the same number. The proposed converter works as follows.

A binary-positional code is formed by bordering a group of input groups with a unit of higher-order bits by the highest-order unit in the positive group of output-code bits and a low-order unit in the negative group of output-code bits.

For example, to represent binary code A - 1001111000010 in a single-digit (differentiated) form, code A is recorded as

scrap of positive and negative bits.

The drawing shows the block diagram of the proposed Converter

In the drawing, the group of elements 1-6 is indicated, the group of elements is NOT 7-12, the group of elements OR-NOT 13-18, the outputs of the 19 positive group of bits, the outputs of the 20 negative group of bits,

13

12 11

ten

eight

those. the binary code was differentiated, starting with the highest bit. When a binary code is fed to the inputs 2 ... 2, for example 1011101, the code 1010001 is formed at the output () 19, since from the input bus 2 it goes directly to the output () 19, besides, the elements 2 and 6 and the output 1 , since the inputs of the elements NOT 8 and 12 are present

ABOUT.

(About not inscribed).

If you count the number 1 in positive and negative bits,

then they are for any JJ code combination

necessarily equal to each other, on which the functional control of the operation of various devices operating in the position-sign system is based.

15

BUT

+ 2-2

13,12,10,6,2,1 - the exponents, which correspond to the number of digit code A.

Thereafter

according to no- (+) or (-)

a measure of degree and sign

number A was written as two

code combinations

6

1 o

At the (-) 20 output, a code of the form -01000101 is formed, since 1 from the input bus 2 directly enters the output (-) 20 and corresponds to the discharge. In addition, on the seedlings of the elements OR NOT 13 and 17 is missing

11) M

I.

In this way, the binary position code of the type is generated.

Claims (1)

Invention Formula A binary code converter into a position-sign code containing a group of (n-1) NOT elements, where the input code is a bit, and a group i of (n-1) AND elements, whose outputs are low-order outputs the positive group of the converter, the output of the higher bit of which is the input of the higher bit of the converter, the i-th (i 2, ..., n) input of which is connected to the input of the (i -) - ro element of the NOT group whose output is connected to the first input ) ro of the AND group, the second input of which is connected to the input (il) -ro of the converter section, characterized in that, in order to extend the functionality by providing performance monitoring without special control codes and generating a code with the same the number of positive and negative bits, a group of (n-1) OR-NOT elements is entered into it, the first inputs of which are connected to the inputs of the corresponding bits of the converter, the second inputs of the elements of OR-NO group are connected to the outputs of the corresponding elements of the NOT group, the input of the lower digit of the converter together with the outputs of the elements of the OR-NOT group forms the n lower bits of the outputs of the negative group of the converter, the output of which (n + 1) -th bit is connected to the output of the (n-1) -th element of the NOT group.