SU1427414A1 - Indication device - Google Patents

Abstract

The invention relates to computing technology and can be used in visualization equipment for alphanumeric information. The aim of the invention is to increase reliability. The device comprises a control unit, two switches, a memory unit, a code conversion unit, a pulse counter, a shift register, a column driver unit, a row driver unit, a decoder, a digital indicator unit, an OR element, a repeat selector pulse selector. about 1 il.

Description

The invention relates to calculating (Telecom technology and can be used in the equipment for visual display of alphanumeric information with iWHo

The aim of the invention is to know the reliability

The drawing shows the functional scheme of the device for the comic 10.

The device contains a control unit 1, the first 2 and the second 3 ipbij switchboard, a memory unit 4, a code converter unit 5, a pulse counter 6, an IS moving register 7 a column generator unit 8; decoder 9 block About line formers j block il digital indicators, element OR 12, selector 13 pulses in frequency of tore, informational bus lA, adapta otoh ojHHy 15 and bus 16 control o Control block 1 contains a generator 17 pulses, element And 18 ,, counter 19s decoder 20 and inverters 2i 25 and 22 o

The display device operates as follows.

Initially, in block 4 of the memory is recorded, information is transmitted from the information zone of the bus 14 to the addresses; incoming by. A. rail bus 5c

At the same time, the control signal is present on the bus S6 of the control bus for “- writing information to the memory block 4 by .j, - to the address coming from the address bus 15 through the switch 2 to the address, memory chips of the memory block 4

Thus, in block 4, the memory of each character is written at the 0 specified address.

When the signal changes to Tina I6 and the device is etched, it goes to the reset of the damn (line by line) IC dikatsik of the contents of block 4 pagotio. The control input of the first switch of the torus 2 is supplied with the potential from the first output of block i of control, which oeec blocks the passage of th “is a group of outputs (medium bits) of the counter 6 pulses per address inputs of memory block 4; TI8 from the output of which the read codes of b-shells through block 5 of code conversion and the second mutator 3 is entered into the shift mode of the page 7 and then through block 8 of the spinner: (it receives columns of 1 digital display on it)

The code conversion unit 5 controls the code taken from the third group (most significant bits) of the counter 6

AND -5PULTS t;

The operation of the second switch 3 controls the signals taken from the first group of switches; the least significant bits of the counter 6 pulses. At this point in time, the decoder 9 is blocked from the output of the control unit 1 of the follower TejibHo, klk Chi unit 10; - the lines are closed and the digital indicators block 11 are not illuminated. After the entry into the shift register 7 of the line information is completed, the decoder 9 is unblocked by a signal from the output of the control unit 1 and the key in the block 10 of the line conditioners, corresponding to excited with TKVO Then the process of excitement: the process for each of the rows occurs cyclically

To ensure the integrity of the indicators of the digital indicators block 11 in the event of the stop of the pulse counter 6 or the failure of a key of the block 10 of row formers or another element affecting the dynamic sweep, signal from the output of the block 10 of the line formers through the OR element 12 arrive at the input of the selector 13 pulses at a repetition frequency

As soon as the pulse sequence stops, the selector 13. Of pulses on the repetition frequency works and clears, shift register 7 This will result from ::: the key of this row of the IS block of digital indicators and it will be saved

Consequently; in the presence of non-homogeneity in the block of 10 line formers, the decoder 9, the pulse counter 6 and the control block 1, the register 7 is set to the zero state and in the I1 block of digital indicators there is no irreversible thermal

Ula Invention Form

The device before the indication g contains the control unit, the first switch, the second switch, the address inputs of which are connected to the first group of inputs of the counter, pulse), the block

14274).

digital indicators, the first group

whose strokes are connected to the outputs of the block of column formers, the second group of inputs of digital indicators is connected to the outputs of the block of row formers, the inputs of which are connected to the outputs of the decoder, the second output of the control unit is connected to the input of the pulse counter, which is To increase reliability, a code conversion unit, a shift register, a pulse selector for the repetition frequency, and a memory block are added, with the first and second information inputs of the first switch connected to the input address bus of the device and to the second group of outputs of the pulse counter, the control input of the first switch is connected to the control bus of the device and to the control input - the house of the memory unit, the address inputs are connected to the outputs of the primary. 25

15

20

Q 5

15

0

the switch, and the information inputs to the device information spike, the outputs of the memory unit are connected to the first group of inputs of the code conversion unit, the second group of inputs of which are connected to the third group of outputs of the pulse counter and correspond to -) the first inputs of the decoder, the auxiliary input of which is connected to the first output of the control unit, the third output of the control unit is connected to the clock input of the shift register, the information input of which is connected to the output of the second switch a, the outputs of the block row generators are connected via a serially connected element OR and a pulse selector by the repetition frequency connected to the reset register house, the outputs of which are connected to the inputs of the column driver unit, the outputs of the code conversion section are connected to the information inputs of the second Kotf mutator

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Claims (1)

Claim A display milking device comprising a control unit, a first switch, a second switch, the address inputs of which are connected to the first group of outputs of the counter. Pulses, block 142741 digital indicators, the first group of inputs of which is connected to the outputs / block of column shapers, the second group of inputs of digital indicators is connected to the outputs of the block of line shapers, the inputs of which are connected to the outputs of the decoder, the second output of the control unit is connected to the input of the pulse counter, the OR element, different in order to increase reliability, a code conversion unit, a shift register, a pulse selector by the repetition rate, and a 15 memory block are additionally introduced into it, the first and second formation inputs of the first switch are connected respectively to the input address bus of the device and. with the second group of outputs of the pulse counter ₂ , the control input of the first switch is connected to the control bus of the device and to the control input of the memory block, the address inputs of which are connected to the outputs of the first.-25, 4th switch, and the information inputs to the input the information bus of the device, the outputs of the memory block are connected to the first group of inputs of the block · code conversion, the second group of inputs of which is connected to the third group of outputs of the pulse counter and the corresponding inputs of the decoder, the additional input of which connected to the first output of the control unit, the third output of the control unit is connected to the clock input of the shift register, the information input of which is connected to the output of the second switch, the outputs of the line shaper block are connected in series * to the OR element and the pulse selector in repetition rate are connected to the shift register reset input the outputs of which are connected to the inputs of the column formers block, the outputs of the code conversion block are connected to the information inputs of the second switch.