SU1425845A1 - Device for convolution of binry code to modulo k code - Google Patents

Abstract

The invention relates to the field of automation and computer technology and can be used in the construction of systems for the transmission and processing of discrete information. The purpose of the invention is to expand the field of application of the device due to the possibility of obtaining an arbitrary value of the module K. The device contains a binary code conversion unit 1 into two g-bit codes and a modulo K summation unit 2 containing a node 3 convolutions of two g-bits the codes in (jlog (K + 1) + 1) are the code and the converter of the binary code in the code modulo K, the inputs 5 and the outputs 6. 3 Il.

Description

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The invention relates to automation and computing and can be used to build systems for the transmission and processing of discrete information.

The purpose of the invention is to expand the field of application of the device due to the possibility of obtaining an arbitrary value of the module

Fig. 1 shows the layout of the device for the day convolution of 24 bit binary code into a code modulo K 5; FIG. 2, a schematic of the device for convolving a 30-bit binary code into a code modulo K 11; in FIG. 3 ::: Skeme convolution node of two r-bit ones: 1 soda in (llogg (K + 1) +1); 5 bit code for the case of a module,.

A device for convolving a binary code into a code modulo K contains a binary code conversion unit at two G of a bit of a code and a block 2 summing lOM modulo Kj, including a node 3 of convolution of two g-bit codes in

; Qlog2 | (K + 1) + 1) -digit code and converter 4 of binary code to code: modulo Ke inputs 5 and outputs 6.

BLOCK 1 converts binary code to two g bits of code, where

t is the power of the set of values of residues modulo K of the source code, contains t Russ of adders, the adders of the first Russ being connected to the inputs of the device with weights, having the same values of the residues modulo the inputs of the adders of the i-ro Rus (1 it) are connected to the outputs of the adders the previous outputs or the outputs of previous accumulators and the inputs of the device with weights having the same modulo K residues, the outputs of the last and last accumulators are the outputs of a block of corresponding weight,

Node 3 convolutions of two r-bit codes in (jlogJ, ()) - each case contains day binary numbers connected in series, and the inputs of the i -ro of the first adder are the inputs of the node with the CO (2-) modK (i 1,2, .., d), the last adder moves are the outputs of the node 7 the outputs of the adder (J 5: 1) with W are connected to the inputs of those bits of the subsequent adders for which the sum of the weights of the inputs modulo K is equal to, (W ) raodK

Converter 4 binary code to code modulo K contains a threshold unit 7 connected by inputs to the inputs of the converter, and output to inputs of the adder 8 with numbers corresponding to the numbers of the single bits of the binary representation of

(| с4 (1С ..

2.-K, second, group of inputs

adder 8 is connected to 3) - converter inputs with weights 2 (4i 0,1,, .., llogjCK + DC -1). The threshold unit 7 is a threshold element with weights of inputs 2 (i 0,1,.,., Log CK + Dt) and a threshold and can have any known structure.

FIG. 1-3 denoted as adders 9-30.

The device works as follows.

When a binary code device is fed to the inputs 5, block I converts it into two g-bit codes, and

(x; 2 -) TnodK (+,

i () (

/ modK,

,

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0

where x; , Woo,

y - the value of the j-ro bit yes-th

 the code on the outputs of block 1. The codes from the outputs of block 1 on the conversion of the binary code to two g-bit post codes are written to the inputs of node 3 convolutions of two g-bit codes in - Cjlogj (K + 1) 11 + 1) The unit of block 2 is the summation modulo K, which forms on its codes, Qlogj () t + 1) a parity code of z, with, than,

  P . .Day) and

(ZIx; 2) modK (21) modK. ,

The code from the outputs of node 3 convolutions is iCTynaeT to the inputs of the converter 4 of binary code modulo K, which generates the output signal. If the code Z K is fed to the inputs of block 4, then a zero signal is generated at the output of the threshold block 7 and the code from the inputs of block 4 passes to the outputs of the adder 8 without changes. If code 4 g K arrives at the inputs of block 4, then a single signal is generated at the output of threshold block 7 arriving at a group of inputs of adder 8, while a code of Z-K number equal to modulo K of the code 4 at the inputs of block 4 is formed at the outputs of adder 8

Let, for example, single signals are applied to the inputs x, x, x, x,

x, 15 2- devices for convolving a binary code into a code modulo K Zg depicted in FIG. 2 This causes single signals at the outputs and transfer of adders 15, 22, outputs of the sum of adders 16-21 and 23, outputs of transfer of matchmators 24-- 26, the output of the sum of the adders 27-29 and the output of the sum and the output of the transfer of the adder 30 of the block 1 of the binary code sample into two grades (). Codes from the outputs of block 1 are fed to the inputs of the adder 9 of node 3 of convolution of two r-bit codes in (. K. +) 1 + bit, which causes single signals, at its outputs s, and p, with single signals At the outputs of the sum Sj of adders 10 and 11c. The code from the outputs of adder 11 is fed to the inputs of converter 4 of binary code into code modulo K, since it is less than K, the single signal from the output Sj of adder 11 passes to. the output Sj of the adder 8, the code of the number 2 equal to the remainder modulo 5 of the input code appears at the outputs of the device 6

Thus, the device provides convolution of any binary code

including Nenat; this, in the code for any module k,

5 formula of the invention

A device for convolving a binary code into a code modulo K comprising a binary code conversion unit

two g-bit codes (g is the power of the set of residual values modulo K of the source code) and the modulo K modulation block whose outputs are device outputs and input ™

You are connected to the outputs of a binary code conversion block into two G-bits, the inputs of which are connected to the inputs of the device, characterized in that, in order to expand the field of application of the device due to the possibility of using an arbitrary value K, contains a convolution node of two r-bit codes in Qlog (K + 1))

The bit code and the binary code to modulo K converter, whose outputs are the outputs of the modulo-sum block, p. inputs connected to the node outputs

convolutions of two G-bit codes in

(Jlogj (K + 1) C +1) -digit code, the inputs of which are the inputs of the summation block MO to the module K,

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Claims (1)

Claim A device for convolution of a binary code into a modulo K code, containing a unit for converting a binary code into two r-bit codes (g is the power of the set of residual values modulo K of the source code) and a summing unit modulo K, the outputs of which are the outputs of the device, and the inputs connected to the outputs of the block conversion of binary code into two g-bit code, the inputs of which are connected to the inputs of the device, characterized in that, in order to expand the scope of the device due to the possibility of using an arbitrary value · K, b a modulo K summing block contains a convolution node of two r-bit codes in Qlog ₂ (K + 1) [+ 1) a bit code and a binary code to code modulator K, whose outputs are outputs of a modulo K modulo summing block, p the inputs are connected to the outputs of the convolution node of two r-bit codes in a (] log ₂ (Κ + Ϊ) C + 1) -bit code, the inputs of which are the inputs of the summing unit to module K. FIG. 2