SU1410272A1 - Displacement-to-digital converter - Google Patents

Abstract

The invention relates to the field of automation and computing and can be used to connect analog information sources with a digital computing device. In order to improve the accuracy of the converter by moving the servo balancing system from a false zero state to a displacement transducer into a code containing a sinus-cosine angle sensor (ACS) 1, code generation unit 2, memory block 3,: pulse distributor 4, A reversible counter 5 is introduced. SKD 1, together with unit 2, forms a system of balancing between angle d. and code N. Under conditions when the internal fluctuations of the system are less than the discreteness of the change of the N code, the system may lose self-synchronization and set it to the false zero state. In order to remove the system from the false zero state in the distributor 4, three control pulses are sequentially generated when polling the converter. At the same time, the previous code of the reversible counter 5 is stored in the memory block 3. When polling a transducer multiple times, its readings are compared. 1 il. i (L

Description

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j The invention relates to automation and computing and can be used to communicate analog information sources with a digital computer. j The aim of the invention is to increase the accuracy of the converter by means of I removing the system for tracking balance I sewing from the false zero state, I The drawing shows the structure j of the converter circuit.

The displacement transducer to the code contains a sine-cosine sensor (ACS) 1, a code generation unit 2, a memory unit 3, a pulse distributor A, a reversible counter 5. The code generation unit 2 contains an amplifier 6, a phase-sensitive rectifier 7, pitch to frequency, elements 9 AND, 10 AND, reversible counter 11, block 12 of the functional conversion of a code into a voltage.

The converter works as follows.

At the outputs of block 12 connected to the ACS 1 inputs, alternating current voltages are generated, the amplitudes of which are proportional to the sine and cosine of the N code of the reversible counter 11. The ACS 1 output generates a voltage that is phase-shifted relative to the carrier signal of the ACS 1, proportional displacement d. The output voltage of the ACS 1 is compared in phase on the phase-sensitive top - sensor 7 with the carrier voltage from the output of block 12. Block 8 produces

impulses whose frequency is PROPORTION

the output voltage of the phase-sensitive rectifier 7. Vcod pulses of block 8 through the elements 9 And 10 And depending on the sign of the mismatch between a (and N are fed to the addition inputs or subtraction of the reversible counters 11 and 5, respectively, reducing the mismatch between (and N.

As a result, at the outputs of counter 11, a code N is formed that corresponds to the angle 0 within the pole division of ACS 1. When the converter reads as a result of asynchronous pickups less discretization, a situation is possible when the converter, being in the false zero state, will not self-synchronize . For exclusion

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possible error converter must be out of balance. For this, when interrogating the converter in the distributor 4, three pulses are formed. The leading edge of the first pulse reverses the contents of the reversible counter into memory block 3, the reversible counters 5 and 11 are wrapped with the second pulse, the third pulse introduces an additional error into block 8. At the end of the third pulse, the converter is in an equilibrium between o (and N, and on the falling edge of the first pulse into the reversible counter 5, the information from the memory block 3 is rewritten. When repeatedly polling the converter, the deviations of its readings from each other should not exceed the determined th magnitude.

The reversible counter 5 is designed to form a code when moving by more than the magnitude of the pole division of the ACS 1 from any position conditionally assumed to be zero by zeroing the reversible counter 5 without overwriting its contents into the memory block 3. After such a zeroing, the reversible counter 5 further operates in the accumulation mode of the input pulses. F o rm ula invention

A displacement transducer into a code containing a sine-cosine sensor, the output of which is connected to the analog input of the code generation unit, a memory block, a pulse distributor, the first output of which is connected to the control input of the memory block, the second output to the first control input of the formation unit codes, characterized by the fact that, in order to improve the accuracy of the converter, a reversible counter has been entered into it, the addition and subtraction inputs of which are connected to the first and second outputs of the code generation unit, the strokes and outputs of the reversible counter are connected respectively to the outputs and information inputs of the memory unit, the third output of the pulse distributor is connected to the reset input of the reversible counter and to the second control input of the code generation unit, the third output of which is connected to the sine-cosine sensor input.

Claims (1)

The invention contains a displacement converter into a code containing a sine-cosine sensor, the output of which is connected to the analog input of the code generation unit, a memory block, a pulse distributor, the first output of which is connected to the control input 'of the memory block, and the second output to the first control the input of the code generation unit, characterized in that, in order to increase the accuracy of the converter, a reverse counter is introduced into it, the addition and subtraction inputs of which are connected to the first and second outputs of the formation unit odov, adjusting the inputs and outputs of the reversible counter are respectively connected to data inputs and outputs of the storage unit, the third pulse distributor output connected to the reset input of down counter and to the second control input of the code forming unit, the third output is connected to the input of the sine-cosine encoder.