SU1403055A1 - Information input device - Google Patents

Abstract

The invention relates to automation and computer technology and can be used to enter information into electronic keyboard computers. The purpose of the invention is to simplify the device. The device contains a pulse generator 1, two elements And 2, 8, a counter 3, two switches 4, 7, register 5, trigger 6, delay element 9. With the arrival of the start signal, switch 4 successively sends to the control inputs of switch 7 binary The decimal codes of the digits of the number stored in register 5. Switch 7 simulates the ECM keypad for switching the arithmetic logic unit (ALU) functions to its information inputs. For example, when entering the control codes of the switch 7 with the code 0101 on the information inputs of the ALU, the signals corresponding to the pressing of the "5" key on the EPRM keyboard are received. After entering all the digits of the number from register 5, the counter 3 is blocked, the signal "Input is removed and the device returns to the initial state. 5 Hvi. I (L

Description

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The invention relates to automation and computer technology and can be used to enter information into electronic keyboard computers.

The purpose of the invention is to simplify the device.

FIG. 1 shows a functional diagram of the device; in fig. 2 is a diagram of the second switch; in fig. 3 - the table of switching of the discharge signals of the arithmetic-logic device (ALU) to the switch outputs with different control codes at its outputs; in fig. 4 - time diagrams of the ALU bit signals; in fig. 5 is a diagram of a device for polling a calculator keyboard with bit signals of an ALU.

FIG. 1 denotes the pulse generator 1, the first element AND 2, the counter 3, the first switch 4, the register 5, the trigger 6, the second switch 7, the STOpoii element AND 8, the delay element 9, the start input 10 yc i - devices, information inputs AND, control input inputs 12, information output devices 13, ALU 14 calculator.

The second switch 7 contains a single-channel multiplexer 15, a single-channel demultiplexer 16, a two-channel multiplexer 17, the first 18 and the second 19 AND elements — NOT, the NOT element 20. control inputs 21, inputs 22 of the ALU discharge signals, switch start input 23 () a, exits 24 switch.

The device works as follows.

In the initial state, the input “10” of the device receives the signal “O. The second switch 7 is then blocked, and the trigger 6 and the counter 3 are in the zero state. At the inputs 12 of the device (at the information inputs of the second of the switch 7) there are bit signals of the ALU 14.

With the arrival at input 10 of device "1 {trigger signal), the blocking is removed from the second switch 7 and counter 3. At the information input of trigger 6, a signal" 1. " The first impu; 1s (after the occurrence of the trigger signal) 1 of the generator of 1 pulses, which arrives through the delay element 9 to the clock input of the trigger 6, sets it to the one state. However, this pulse does not pass through the first element AND 2 to the counting input of counter 3, since trigger 6 unlocks the first element AND 2 only after the end of the pulse. The control inputs of the first switch 4 receive the zero code of the counter 3, while the code of the high bit of the number stored in the register 5 is fed to the control inputs of the second switch 7. According to this code, one of the bit signals goes through the second commmutator 7 to a certain input of the ALU 14. The highest digit of the number is entered.

After the appearance of the second pulse of the generator 1 pulses, the contents of the counter 3

five

increases by one, since the trigger 6 by this time is set to one state and unlocks the first element AND 2. The control inputs of the second switch 7 receive the code for the next digit of the number, and it is entered into the ALU 14. Thus, with the arrival of successive pulses pulse generator 1, the numbers are entered sequentially from register 5 into ALU 14. Decimal point codes (comma) and character are stored in register 5 and entered in the same way as digital digits of a number.

At the moment when the code of the address corresponding to the last input bit appears at the outputs of counter 3, the signal "O" appears at the transfer output of counter 3 and, accordingly, at the information input of trigger 6. The trigger 6 is set to the zero state by the leading edge of the delayed pulse of the pulse generator 1.

0 and prohibits further passage of pulses from the generator 1 pulses to the counting input of the counter 3.

At the end of the start signal, the device returns to its original state.

From the first group of device inputs 11 into the register 5, the code of another number is entered, and the input cycle is repeated.

The frequency of the pulse generator 1 is determined by the input time of one bit in the used ALU 14. Delay element 9

„Ensures stable operation of the device when entering the first and last digit of a number.

The ALU 14 bit signals are phase-pulse-coded signals (Fig. 4) and are designed to provide the liver with a dynamic indication of the output information of the ALU 14. In addition, certain bit signals are used to enter information (numbers and operations) in the ALU 14. According to FIG. 5, nine bit signals CS1-CS9 provide a dynamic indication of an 8-bit decimal number and character. Bit signals CS2-CS6 arrive at the keyboard and are used to enter information in the ALU 14. For example, when the contact "5 signal

5 CS3 is fed to the input of the fault code ALU 14, the value of the number 5, and so on, is entered into the working register of it.

In the proposed device, the second switch 7 according to the digit code of the number ensures the supply of the corresponding bit

0 signal to a certain input (K1-K4) of the ALU 14, i.e. switch 7 performs, in particular, the function of a keyboard. The time for entering one digit of a number is determined by speed. when assigned to an ALU, it should be, for example, not less than 20 ms. The time 5 is set by the output frequency of the pulse generator 1.

In the initial state at the input 23 of the switch 7 (FIG. 2) there is a signal

"O, which is inverted by the elements AND-NOT 18 and 19 and blocks the multiplexers 15-17, none of the bit signals CS2-CS4, CS6 passes to the inputs K1-K4 of the switch 7. When it arrives at input 23 of the signal" 1, and At the input 21 of the digit code of the number, for example, 0111 (7io), the signal for the multiplexers 15 and 16 receives the signal O, the input of the resolution is multi-way.

Claims (1)

Claims of the invention A device for inputting information, including a counter, a register, a trigger, a first switch, a first AND element and a pulse generator, the output of which is connected to “. And MP y, / 1О1 „ИО, DDIAUA 1 VJ VU. V. plexor 17 with the presence of the signal the first input of the first element I. the output “1 and its inputs / outputs are 0.0-0.3, 1.0--1.3. 20 which is connected to the counter input of the counter, the information outputs of which are connected to the control inputs of the first switch, characterized in that, in order to simplify the device, it contains the second the input of multiplexer i6 appears on the switch 15, the second And element, the delay element whose input is combined with the first input of the first And element, and the output connected to the trigger input of the trigger, the output of which is connected to the second input of the first And element, transfer output the counter is connected to the first input of the second element And whose output is connected to the trigger information input, the counter installation input, the start switch input of the second switch and the second input of the second element AND are the device startup input, the register inputs are infor tional device inputs, the register outputs are connected to the data inputs of the first switch, the outputs of which are connected with the control vhoda.mi second switch you "1 is in the high impedance state - 0 passages which are information SRI. Similarly, the switch 7 device outputs, information operates with codes 1000 (sic) and 1011 (the code inputs of the second switch are upnak) at the inputs of the 21 and other inputs of the device. and the inputs / outputs 0.1 are in a high impedance state. The signal CS2, arriving at the input of the multiplexer 15, passes to its output "1 and arrives at course “7 and, respectively, at the output of K4. The multiplexer 16 in this turn-on circuit performs the function of a signal demultiplexer. Switch 7 works similarly with codes 0000-0110 (OYB) at inputs 21 (Fig. 3). When appearing at the inputs 21 of the code 1001 (9 | o), the multiplexers 15 and 16 are blocked, and the signal "O" appears at the input of the multiplexer 17. The CS4 signal, which arrives at the 0.1. Multiplexer 17 input, passes to its 25 O output and, respectively, to the K4 output. For a given control code, a channel is opened at multiplexer 17 between input 1.1 and the second output "1. However, since input 1.1 does not signal, the output Thus, the device is characterized by simplicity of the technical solution and allows the input of large amounts of information. Claims of the invention A device for inputting information, including a counter, a register, a trigger, a first switch, a first AND element and a pulse generator, the output of which is connected to ULJ AND MP y, / 1О1 „ИО, DDIAUA 1 VJ VU. V. the first input of the first element I. exit FIG. g X. - By-impedance state of Fig.Z CSS CS7 CS6 CS5 CS4 C $ 5 CS2 CSf 7 eight . .6 „2 „3 „0 „J F Compiled by V. Faizrakhmanov Editor A. OrapTechred I. VeresKorrektor L. Pilipenko Order 2861/40 Circulation 704 Subscription VNIIPI USSR State Committee for Inventions and Discoveries 1 13035 Moscow, Zh-35, Raushsk nab. 4/5 Production and printing company, Uzhgorod, ul. Project, 4 P V n n ig. l / ffuHamaptf / { / IN A LF A A A A ТТЪ 56759 Allow bf / e CLfs / cf / firf A. ff Hb K2 H1 t i i i .S