SU1401476A1 - Device for simulating failures in electronic circuits - Google Patents

Abstract

The invention relates to computing and can be used to study the reliability of low-frequency electronic circuits at the design stage. The purpose of the invention is to improve the accuracy of modeling by reproducing the processes of changing the parameters of elements without distorting their probability characteristics. For this purpose, a device containing blocks, setting the initial values of the parameters of the elements, the element OR 2, the decoder 3, the switch 4, the control block 5, the sensor 6 of uniformly distributed random numbers, the generators 7, 12, -12, pulses, the element And 8, a distributor of 9 pulses, counters 10, -10, 11, 19, reversible counters 13, -13, typesetting fields 14, -14p, analysis block 15, blocks 17, -17 of memory, introduced the element OR 18. 2 silt

Description

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ABOUT)

The invention relates to computing and can be used to study the reliability of low-frequency electronic circuits at the design stage.

The purpose of the invention is to improve the accuracy of modeling by reproducing the processes of changing the parameters of elements without distorting their probability characteristics.

Figure 1 shows the functional diagram of the device; Fig. 2 is a functional block diagram of the control unit.

The device consists of blocks l, - setting the initial values of the parameters of elements,. the element OR 2, the decoder 3, the switch 4, the control unit 5, the sensor 6 uniformly distributed random numbers, the generator 7 pulses, the element 8, the distributor 9 pulses, counters, 11, pulse generators, reversible counters 13, -13, .models the studied circuit, consisting of compiled fields 14., - 14, block 15, analysis and block 16 measurements, memory blocks, the element OR 18 and the counter 19.

The control unit 5 (FIG. 2) consists of a clock generator 20, pulse formers 21-23, counters 24 and 25, IDN elements 26-28 and triggers 29-31.

The pulse distributor 9 is intended to convert the probability value into a number of pulses equal to the number corresponding to this probability in the generated distribution law.

The device works as follows.

Before the start of the simulation, blocks 1, - 1 ", enter information on the laws of the distribution of the initial values of the parameters of the elements, and blocks 17, -17p - information on the conditional laws of the distribution of the rates of change of parameters over time. The operating frequencies of the generators 12, -12 are set. On type-setting fields, set up ordered rows of elements with the required parameters. In the analysis block 15, the studied circuit is assembled. At the operator's command, the start through the control block 3 is set to the initial state of the distributor 9 pulses, counters 10, -10 ", reversing counters 13, -) 3" and the switch

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4. By following the co -1ande from Plik i ynpanjieHHH, switch 4 is set to the first position. At the same time, block 1 is prepared for operation, setting the initial values of the parameters, the counter 10, and the reversible counter 13 ,. They remain in the working position until the switch 4 enters the next state.

From control unit 5, the sensor 6 receives a command to form the first random number. This number is fed through the decoder 3 to the input of block 1. Next, from control block 5, a command is issued to enable operation of Block 1 and the reversing counter 13. To obtain a random number corresponding to the initial value of the element parameter, a uniformly distributed random number converted by the decoder 3 and block 1 , setting the initial value of the element parameter, enters through the element OR 2 at the element AND 8 and authorizes the passage of regular pulses from the generator 7 to the distributor 9 pulses and to the summing Reversible counter input 13,. When in block 1, the signal corresponding to the formed probability and the signal coming from the distributor 9 pulses coincide, the resolution to the passage of pulses through the AND 8 element to the summing input of the reversing counter 13 and to the input of the block

5, from the output of the element OR 2, a command is issued about the readiness of the first random number corresponding to the initial value of the parameter of the first element. After receiving this command, the synchronization signal from block 1 is removed through the control unit 5, and the reversing counter is given, and the command to operate the counter 10 is given. The counting input of which starts to receive pulses from the generator 7, while in the sensor

A new uniformly distributed random number is formed. As these pulses arrive, the content of counter 10 changes and in memory block 17 addresses are selected in the area corresponding to the number stored in the reversing counter 13. At these addresses, probability codes are read, which through the OR 18 element arrive at the counting input counter 19 until it comes. overflow, which corresponds to formirasszhanin) g.lugppugchchl, fooTRRTCTHytoiiiero of the rate of change of the element parameter,

From the {, 1 counter 19) input, the command of the readiness of the second random iHciia enters into the control unit 5. This command removes the counting work permit 10, discharges the distributor 9 pulses, and switches A to the second position. After this, a second pair of numbers is produced in a similar way.

After the formation of n pairs of random numbers from the control unit 5, a signal is received prohibiting the operation of the pulse generator 7, and to the generators 12, - 2 - allowing. From generators 12d-12 "pulses arrive at the counting inputs of the counters. At the installation, the inputs of these adders from the outputs of the Yut-Yu counters are supplied with the corresponding values of the parameters of the elements. When the counters overflow, pulses are generated at their outputs, which are fed to the subtractive inputs of the corresponding reversing counters 13, -13c. The overflow pulse rates are directly proportional to the codes in the corresponding Jude-Jupe counters and the frequencies of the respective generators,. In accordance with the numbers in the reversible counters 13i-13n, elements installed on the composited fields 15, -15p are connected to the analysis unit 16. The connection frequencies of the elements and, consequently, the rate of change of the parameters are directly proportional to the numbers stored in the counters 10, -10.

To measure the output parameter of the circuit under study at required times, control unit 5 is prohibited from passing pulses from generators 12, -12 g to the corresponding counters for the measurement time. In this case, the switching of elements mounted on composites x 14, -14f, is stopped and those elements whose parameters correspond to the parameters of the circuit elements at a given time are connected to the analysis unit 15. A voltage is applied to the analyzed circuit in analysis block 15 and the required output peer is measured. After measuring the parameters

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through block 5, the prohibition is removed from the generators and the modeling process is applied. Depending on the reliability required, the simulator 11rg) lasts until the output parameter reaches one of the limits of the tolerance field or until the specified time.

Repeated repetition of the described simulation cycle allows us to obtain a set of realizations of the random process of changing the output parameters of the circuit under study, as well as statistical data on failures. This information allows the known methods to calculate the circuit reliability parameters.

Claims (1)

Invention Formula A device for modeling failures in electronic circuits, containing n blocks for setting initial values of element parameters (n is the number of parameters to be modeled), the first OR element, a decoder, a switch, a control unit, a sensor of uniformly distributed random numbers, (n + 1) pulse generators , element I, pulse distributor, (2п + 1) counters, n reversible counters, n memory blocks and the model of the circuit under study, the output of which is the information output of the device, the input of the logical unit of which is connected to On the input of the switch, the control input of which is connected to the output of the code of the number of cycles of the control unit, the output of the command for forming the random number of which is connected to the input of the start of the sensor of evenly distributed random numbers, the output of which is connected to the input of the decoder, the output of which setting the initial values of the parameters of the elements whose outputs are connected to the inputs of the first element OR, whose output is connected to the first input of the element AND whose output is connected to the total they are the inputs of reversible counters and the clock input of the pulse distributor, the output of which is connected to the inputs of the value of the enable signal from the first to nth blocks of setting the initial values of the parameters of the elements, the first synchronous inputs of which are connected to the synchronous input of the first to the nth reversible counters respectively and the enabling output control unit, the output of the beginning of the formation interval of the next random number of which is connected to the first synchronous inputs from the first to the nth counters, the outputs of which are connected with installation inputs combining the parameters of the elements without distorting their probabilistic characteristics, a second OR element is introduced into it, the output of which is connected to the counting input (2n-t-1) -ro of the counter, the initial setup input of which is connected to the sensor output of uniformly distributed random numbers, the input with (n + 1) -th to. The 2nth counters of the respective - - | Q start-up devices are connected to the input The counting inputs of which are connected to the outputs from the first to the nth pulse generator, respectively, the output (n-fl) -ro of the pulse generator is connected to the second input of the element I, and the outputs from the first to the nth switch bits are connected to the second synchronous inputs the first by the nth block of setting the initial values of the parameters, the second synchronous inputs from the first to the nth counters and the synchronizing inputs from the first to the nth reversing counters, respectively, whose outputs are connected from the first to the nth inputs of the cells responsibly model of the circuit under study, The overflow outputs from (p + 1) th to 2 nth counters are connected to the subtracting inputs from the first to the nth reversing counters, respectively, the overflow output of the (2p + 1) th counter is connected to the input of the end of the control unit modeling cycle: characterized in that, in order to increase the modeling accuracy by reproducing the process unit of the control unit, the output of the interval end of which is connected to the reset inputs of the pulse distributor, the first to the nth counters and first to nth reversible counters whose outputs are connected to the first address inputs from the first to nth memory blocks, respectively, whose outputs are connected from the first to nth the inputs of the second element OR, the output of the first element OR is connected to the input of the start of the interval for the formation of the next random number of the control unit, the output of the initial installation of which is connected to the start input of the (n + 1) -th pulse generator, the output of which is connected to the counting inputs of the first th counters, the outputs of which are connected to the second address inputs from the first to the nth memory blocks, respectively, the output of the signal value of the main operation interval of the control unit is connected to the start inputs from the first to the nth gene pulse shafts. / j. W, Wi-rOn VJr / J / 7 2