SU1388899A1 - Device for determining a characteristic function - Google Patents

Abstract

The invention relates to the field of computer technology. The aim of the invention is to improve accuracy. The goal is achieved by eliminating transients when analyzing impulse random processes, as well as by measuring the values of the characteristic function for arbitrary values of the argument. The operation of the device is based on measuring the duration of pauses between pulses, followed by functional conversion and summation of measured values. The device contains counters 1.5, shaper 2 pulses, control block 3, key 4, clock pulse generator 6, memory blocks 7, 16, memory register block 8, multiplier 9, functional converters 10, 11, accumulating adders 12, 13 , division node 15, switch 14, 2, ill. with (L

Description

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The invention relates to computing.

The purpose of the invention is to improve the accuracy of the device.

1 shows a block diagram of the device; Fig. 2 is a block diagram of the control unit.

The device (Fig. 1) contains a counter 1, a pulse former 2, a control block 3, a key 4, a counter 5, a clock generator 6, a memory block 7, a memory register block 8, a multiplier 9, functional

one

converters 10 and 11, accumulating adders 12 and 13, switch 14, division node 15 and memory block 16.

The control unit forms the first element AND 17, element OR 18, the first counter 19, the first 20 and second 21 triggers, the first 22 and second 23 W, the ongoing multivibrators, the first pulse generator 24, the frequency divider 25, the second counter 26, the sixth trigger 27, the second pulse generator 28, the pulse shaper 29, the fourth 30 and the fifth 31 trigger, the third counter 32, the second OR element 33, the third trigger 34 and the second element AND 35 ..

The device works as follows.

The shaper 2 pulses from the source sequence generates two pulse sequences with standard amplitudes and durations. The pulses of one sequence are delayed by the time interval determined by the time of formation of commands in the control unit 3. The first impulse of the delayed sequence, the key 4, is set to a position that ensures the passage of the counting pulses from the output of the generator 6 to the counting input of the counter 5. The counter 5 starts counting these pulses. Each of the pulses of the delayed sequence, taken from the output of the imaging unit 2, zeroes the counter 5, but before each zeroing, the readings of the counter 5 are transmitted to a specific cell of the memory unit 7. Thus, the time interval between pulses in the signal under study is measured. The measurement process ends when the counter I is filled, which counts the total number N pulses in the signal under study. The volume of the counter 1 is chosen based on

20

25

thirty

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There is information about the signal x (t). The signal from the last bit of counter 1 sets the key 4 to the position, d prohibiting the passage of counting pulses from the output of generator 6 to the input of key 4, and simultaneously switches control unit 3 to the operating mode, which provides direct calculation of the characteristic function.

According to signals from control block 3 of block 8, in which the numbers Vj corresponding to the ith value of the characteristic function argument are stored, the number v, is generated. From block 7, the number t, is generated, corresponding to the first measured time interval between pulses in the input signal. In the multiplier 9, the numbers V and tj are multiplied.

In the functional transducers x 10 and 1, the values x cos v, t ,, y sin v, t, are formed.

The generated values of x and y are fed to the inputs of accumulating adders 12 and 13.

After recording the values of x and y in accumulating adders 12 and 13 from memory block 7, the number corresponding to the second measured interval tj, is called, and from block 8 of memory registers a number corresponding to the same argument v is characteristic of the function. In multiplier 9, the origin 35

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dit multiply the numbers v and t. The result of the multiplication is applied to functional converters 10 and 11, the output signals from which are fed to the corresponding adders 12 and 13. Then, from block 7 and block 8, the numbers v are sequentially selected, and

V,

and t

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4, ..., v, and t, which are under analogous transformations 5 to 5 m. Thus, in accumulating adders 12 and 13, the values of the functions N are gradually formed.

Z, (V,) i: cos (v, t;), Z (V,)

1 1 N

 sin (v, tj) for the value of arg0

ment V ,. .

Through the switch 14, the values of the functions Z ,, Z are successively supplied to the division node 15, in which the values of the real and imaginary parts of the characteristic function are generated for the value of the argument

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N

Ime (v,)

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The calculated values of the real and imaginary parts of the characteristic function are stored in certain cells of block 16. In the next step of operation of the device, the number v is selected from block 8 of the memory registers, and from block 7 the numbers corresponding to the measured time intervals tj. The values of the real and imaginary parts of the characteristic function are formed for the value of the argument Vj and the result is written into the corresponding cell of the memory block 16.

The operation of the device ends when measuring the values of the characteristic function for the argument v, j and then counter 1 and accumulating adders 12 and 13 are zeroed.

The control unit operates as follows.

The non-delayed sequence of pulses from the output of the former through the normally open element AND 17 and the element OR 18 is fed to the counting input of the counter 19 and the inputs of the flip-flops 20 and 21. Thus, signals are generated that record the numbers corresponding to the measured time intervals into the block 7 memories. The signal from the output of counter 1 transfers the triggers 20 and 27, closes the element 17 and switches on the generator 24. The pulses from the output of the generator 24 are fed to the input of the frequency divider 25 with a division factor N. The divider 25 provides the necessary operation mode: to determine the characteristic functions with the argument value V; of

block 8 of memory registers it is necessary to select the value of the argument V; , and from memory block 7, the values of measured time intervals are sequentially

From the overflow output of the counter 19 of the control unit 3, a signal is periodically removed, by which the operation of the unit 16 is controlled and the values of the characteristic functions are written to it. Using the waiting multivibrators 22 and 23 of the control unit, the operation of the switch 14 is controlled. The switch 14 alternately connects to the node 15 division accumulating adders 12 and 13. From

using the generator 28 and the imaging unit 29, the division node 15 is clocked.

 Overflow signal

the counter 32 (recording mode) turns off the generator 24.

Reading the information recorded in block 16 is carried out by a pulse Q itself, arriving at the read input of the device.

Using the trigger 34 and the element And 35 is carried out at the point in time corresponding to the end of the reading

.5 from block 16, transfer of block 3 of the control and the entire device to the initial state. When this, the count 1 rank and the adders 12 and 13 are zeroed. The memory blocks are turned off, the

20 and 17 control units.

Claims (1)

Invention Formula A device for determining a characteristic function comprising a clock pulse generator, two memory blocks, two accumulating adders, a dividing node, a first counter, output of which is connected to the input of dividing ratio setting, characterized in that in order to increase the accuracy , a key, a switch, a pulse driver, a second counter, a block of memory registers, a multiplier, two function converters, a control unit containing two AND elements, two OR elements, three counters, six trigger are entered into it. two pulse generators, a frequency divider, two multivibrator pending, a pulse shaper, the input of the pulse shaper is the information input of the device, the output of the delayed pulses of the pulse shaper is connected to the counting input of the first counter, to the input of the O installation of the second counter and the first control The key input, the second control input, the information input and the output of which are connected respectively to the overflow output of the first counter, the output of the clock generator and the counting input ohm of the second counter, the output of which is connected to the informational input of the first memory block, the output of which is connected to the first input of the multiplier, the second input of which is connected to the output of the pe30 unit 35 40 45 50 13  memory, the multiplier output is connected to the inputs of the first and second functional converters, the outputs of which are connected respectively to the inputs of the accumulating adders of the same name, the outputs of which are connected to the corresponding information inputs of the switch, the output of which is connected to the input of the divisible division node, whose output is connected to the information input of the second block memory, the output of which is the output of the device, in the control unit, the output of the first element AND is connected to the first input of the first element OR, with input Set in 1 of the first and second triggers, with the input of the third trigger in O, the output of the first pulse generator is connected to the input of the frequency divider and the second input of the first OR element, the output of which is connected to the counting input of the first counter, the overflow output of which is connected to the start inputs of the first standby multivibrator and second pulse generator, the first input of the second element OR, the installation inputs in the 1st fourth and fifth triggers, the output of the frequency divider is connected to the counting input of the second counter, output the first standby multivibrator is connected to the start input of the second standby multivibrator, the output of the second pulse generator is connected to the start input of the pulse former, the overflow output of the third counter is connected to the stop input of the first pulse generator and the first input of the second element I, the second input of which is connected to the output of the fifth trigger, and the output - with the installation input in 1 of the third trigger, the output of which is connected to the installation inputs in O first 0 first and second counters, second, fourth and sixth triggers, the stop input of the second pulse generator, the output of the second element OR is connected to the counting input of the third counter, the second input of the second element OR is connected to the installation input of the O fifth trigger and is the read input of the device, the start input of the first pulse generator is connected to the first input of the first element I, the installation input in O of the first trigger and the installation input in 1 of the sixth trigger and connected to the overflow output of the first counter of the device; the output of the non-delayed pulses of the pulse former is connected to the second input of the first element I of the control unit; the fifth triggers of the control unit, the bit outputs of the third counter of the control unit are connected to the corresponding inputs of the group of the second memory block, the outputs of the first and second tr control unit iggers, the bit outputs of the first counter of the control unit are connected to the corresponding address inputs of the group of the first memory block, the bit outputs of the second counter of the control unit, the output five 0 0 the sixth trigger of the control unit is connected to the corresponding address inputs of the memory register register, the outputs of the first and second waiting multivibrators of the control unit are connected to the corresponding control inputs of the key group, the output of the pulse generator of the control unit is connected to the clock input of the division node.  go 2 income  group 8xooo8 "