SU1374138A1 - Digital converter for measuring pulse repetition frequency - Google Patents

Abstract

The invention relates to computing and can be used in information conversion systems. The purpose of the invention is to increase the conversion speed. The device contains an input unit 2 and a subtractor 5. In the converter, a digital oscillator 1 of weighted frequencies, registers 3, 4 and 6 and a delay element 7 are used to achieve the goal, and new functional connections are formed. 2 Il.

Description

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The invention relates to the field of computer technology, namely to digital measuring converters, frequency-code, and can be used in information conversion systems.

The aim of the invention is to improve the conversion speed.

Fig. I shows a functional diagram of the device; figure 2 - timing diagram.

A digital converter for measuring the pulse pulse frequency contains a digital frequency generator 1, an input unit 2, first and second registers 3, 4, a subtractor 5, a third register 6, a delay element 7, an external control input bus 8, an input information bus - On the 9th and the output bit bus 10 of the result, the output of the input unit 2 is connected to the synchronization inputs of the first and second register 3, 4 and through the terminal 7 a delay with the synchronization input of the third register 6, the outputs of which are connected to the output discharge bus 10 result The outputs of the weighted frequency generator 1 are connected via the first register 3 to the information inputs of the second register 4 and the first inputs of the subtractor 5, the second inputs of which are connected to the outputs of the second register 4, the output of the upstream 5 are connected to the information inputs of the third register 6, the control inputs of the digital oscillator 1 of weighted frequencies and the input unit 2 are connected to the input information bus 9.

The device works in the following way.

When the external control of the digital control signal is applied over the input bus 8, the input of the input block 2 is unblocked and the digital oscillator 1 starts weighted frequencies, the outputs of which generate the current digital code N, where i is the number of conversion cycles, and the preset resolution frequencies of duration T where TD is the duration of the period of the lower reference frequency, n is the size of the device (Fig. 1, Fig. 2 a, g-f).

From this point on, the required frequency signals of the following period T will pass through the input block 2

which are undergoing conversion to digital form (figure 2 (.).

When the required frequency pulses of the following period T are received, the leading edge of the digital signal generated at the output of the input block 2 (Fig. 2c) is written to the current code Nj of the initial conversion phase through the information inputs to the first register 3, which will be set at the digital outputs generator 1 weighted frequency. At the same time, the digital code N will be recorded in the second register 4 according to its information inputs. final y1

Threat, listed in the previous conversion cycle in the first register 3 (Fig. 2d-).

Next, the generated n-bit codes Nj, N, the relative values of the desired period T at the outputs of the first and second registers 3, 4 are fed to the inputs of the subtractor 5, in which the logical subtraction operation is performed to calculate the result code:

Nb., -. N, .. - N,., - (1) At the next point in time, the resulting code generated at the outputs of subtractor 5 will be rewritten in the third register 6:

NV N ,,. , -., (2)

which passes to the output bit bus 10 of the result.

At this, the current cycle of the conversion cycle is completed and the device is prepared for the next conversion cycle, which is performed with the arrival of successive pulses of the desired frequency on the output information bus 9 of the device and is executed without changes according to (1) - (2). In this case, the operation of the device can be forcibly stopped when the digital control is removed; its signal is via the input bus 8 of the external control (Fig. 2a).

Claims (1)

Invention Formula A digital converter for measuring the pulse frequency, containing an input unit and a subtractor, characterized in that, in order to increase the conversion speed, a weighted frequency generator, first, second, and third registers and an element of the output, the input of the unit is connected to the synchronization inputs of the first and second registers and through the delay element to the synchronization input a third of its register, the outputs of which are connected to the output bit bus of the result, the outputs of the digital weighted frequency generator are connected through the first register to the information inputs of the second the register and the first inputs of the reader, the second inputs of which are connected to the outputs of the second register, the outputs of the subtractor are connected to the information inputs of the third register, the control inputs digital th weighted frequency generator and the input unit are connected to the external bus control input, and an input unit input coupled to the output data line. one