SU1363538A1 - Apparatus for correcting hf predistortion of secam colour signal - Google Patents

Description

The invention relates to television technology and can be used in the composition of the decoding devices of the SECAM system with digital signal processing.

The purpose of the invention is to increase the accuracy of the chroma correction signal.

Fig. 1 shows a structural electrical circuit of a device for correcting high-frequency predistortion of the chrominance signal of the SECAM system; in fig. 2 shows an embodiment of the multiplier.

The correction device for high-frequency predistortion of the chroma signal of the SECAM system (Fig. 1) contains an analog-to-digital converter (ADC) 1, first adder 2, first 3 and second 4 delay blocks, second adder 5, third delay block 6, first multiplier 7, fourth block 8 delays, the third adder 9, the fifth 10, the sixth 11, the seventh 12, the eighth 13, the ninth 14 blocks of the delay, the second 15, the third 16 and the fourth 17 the simulator.

In addition, each of the multipliers 7, 15, .16 and 17 (Fig. 2) contains the first 18, second 19 shear blocks and adder 20,

The correction device for high-frequency predistortion of the chrominance signal of the SECAM system works in the following way.

The input analog video signal is converted to ADC 1 in digital form with a sampling frequency of 17 MHz. The digital video signal is fed to a non-recursive comb filter made using the first adder 2 and the sixth delay unit 11, and the delay in block 11 is equal to two periods of the clock frequency. The comb filter serves to preselect the chroma signal from the full television signal.

The remaining blocks of the device form a combination of recursive and non-recursive filters whose structures are reduced to a form that allows them to be implemented with minimal requirements for the speed of the elemental base, while ensuring that no more than one addition of twelve-digit binary numbers is performed in one sampling period.

From the output of the comb filter (output of the adder 2) through the first block 3 of the delay, the signal is fed to the input of the recursive filter with the transfer function described by the expression

H

ъ + c-z

() 1 - ClZ (1)

The constant coefficient in the denominator of expression (1) defines the loop transfer coefficient defined by the first 7 and fourth 17 multipliers. Loopback loop closable

to the second input of the second adder 5, contains in series the second adder 5, the third delay block 6, the first multiplier 7, the fourth delay block 8, the third adder 9, five delay block 10, the fourth multiplier 17 and the ninth delay block 14. The product of the transfer coefficients of the first 7 and fourth 17

multipliers should be equal to Co.

To form the numerator of expression (1), the input signal of the recursive filter comes in two points of the loop.

feedback separated by two (third 6 and fourth 8) delay blocks. In accordance with expression (1), the signal at the input of the second adder 5 is fed without scaling, and at the input of the third adder 9 through the second 15 and third 16 multipliers. The transfer coefficient of the second 15 and third 16 multipliers C is chosen so that the product C

by the transfer coefficient of the fourth 17 multiplier by a constant coefficient was equal to Cd.

 The seventh 12 and eighth 13 delay blocks are designed to separate

during the operations of multiplying by constant coefficients in the second 15 and third 16 multipliers, and the second delay unit 4 (by Tja 2 / f) is designed to compensate for the time shift in the seventh 12 and eighth 13 delay units.

The output signal of the high-frequency predistortion corrector is taken from the output of the recursive filter (ninth

block 14 delay).

All constant coefficients of smart-i residents are chosen so that the multiplication operation can be replaced by addition, i.e. represented as the sum of two powers of two

KV; .H. 0.75 2-H 2

Jmh

.g 1.5 2 + 2K

"N, 3

1.125 2 ° + 2

-four

K, "". 4 1,0625 2 + 2

FIG. Figure 2 shows an example of the implementation of a multiplier that allows one to obtain the above values of the coefficients by adding the input number shifted by k and n bits. As can be seen from expressions (2), for the second, third, and fourth multipliers, only a shift of one of the terms arriving at the input of the adder 20 is required.

FIG. Figure 1 does not show the clocking circuits of the delay blocks, which are registers, and are intended (with the exception of the second 4 and sixth 11 delay blocks) for dividing in time the operations carried out in adders and multipliers.

The proposed device with respect to the prototype has a phase characteristic closer to the standard for the SECAM system, and also provides a better separation of luminance and chrominance signals.1,

ten

15

20

25

thirty

35

Claims (1)

Invention Formula A device for correcting high-frequency predistortion of the chroma signal of the SECAM system, containing a series-connected analog-to-digital converter (ADC), whose input is the device input, the first adder, the first and second delay blocks, the second adder, the third delay block, the first multiplier, the fourth delay block, as well as fifth, sixth, seventh, eighth and ninth delay blocks, characterized in that, in order to improve the accuracy of the chrominance signal correction, the second, third and fourth multipliers and the third with an adder, whose output is connected to the input of the fifth delay block, and the first and second inputs are connected respectively to the outputs of the fourth and eighth delay blocks, the sixth delay block is connected between the ADC output and the second input of the first adder, the second multiplier is connected between the output and the input of the first and the seventh delay block; the third multiplier is connected between the output and the input of the seventh and eighth delay blocks, respectively; and the fourth multiplier is connected between the output of the fifth delay block and the input of the ninth block delay, the output of which is connected to the second input of the second adder and is the output of the device. entrance Cleverman one go Output Editor I. Kishtulints FIG. 2 Compiled by L. Stasenko Tehred M. Khodanich Proofreader S. Shekmar Order 6383/57 Circulation 636 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Project, 4