SU1350808A1 - Frequency converter - Google Patents

Abstract

The invention relates to radio engineering and dp quantization of high frequency harmonic signals can be used. An extension of the input signal frequency range is provided. The frequency converter contains a reference oscillator 1, controllable keys (CC) 2, 3, frequency dividers (DC) 4-6, a driver of 7 pulses, a driver of 8 control pulses, a DC 9 with a variable ratio, division. the counter 10 and the memory register lie, the CPU 6 performs the division of the frequency of the input signal by t Shaper 7 in the MFRJHT nonoKiiT. When a sinusoidal signal passes through zero, it generates impulses about DF 5 kozf de penny g1. For each and: Yly from DF 5 shaper 8 generates control pulses. At the odd pulses, the CC 2 opens. by 4j having the coefficient d, k ,. Overflow pulses with PM 4 are counted by counter 10. But following the odd control implant, the contents of the N counter 10 are entered into the register 1 1 D.K.P. control of goat, dividing 9 and the CC 3 opens, and the pulse of the reference oscillator is received through CC 3 to the counting input DC 9, At its output, pulses with a frequency of (k fr, x) n appear: -, -, rff / TJ Sblv 1 ILV

Description

one

The invention relates to rag: ete: x-peak to sr and it can be Sch1T1-1.s.po..l, goat but in measuring equipment, n, r1 quaigar armonic from the transducer;

The aim of the invention is in (l1; g; I am expanding the range of airflow loudspeaker mogs SRG-- nal,

On the circuit, there was a first unit electrical electrical schema pg of the frequency hopper.

Frequency converter; .cc1: r reference frequency ;; chooser 1, 2 and JITOR 3; controllable keys irujiEiv.M 4 second 5 and third 6 divides the t; j Atoty, driver / impulse;:, fr-processor 7 controls; about 1 impulses, divider 9, frequencies with a succession of dividing, dividing, counts to 10 to register 1 1 memory.

Frequency converter ggaboet, speduyu1g; 1 m way.

The pulses from the output of the rns-e rt-e - rator 1 through the angle of 1kg klloch 2 arrive at the counting input of the rotary divider 4j from the output of which the impulse 5) overflow overflow enters the countershaft; the input of the counter 10 the output of the shaper 8 to the input of the record of the register 11; the contents of the counter 10 rewrites-- c to the register 1 and is used to control the division factor of the divider 9. At the same time, the impulse y: i equalize from the output of the shaper i sets the first divisor; counter 0 to the initial state, closes ne The left control key 2 and opens the second control key -5: key 3, The pulses from the output of the reference generator 1 through the second control key 3 are fed to the counting input of the divider 9 at the output of the / keynote from the form and the sequence: -: gigulso

with frequency,

you

where f is the frequency of the following: .- the output of the reference generator I: K is an integer; the binary code is written in register 1

At the output of the former S through the so-called impulse-3 home, from the output of the second division of the body 5, control impulses are generated, and per odd control key opens in odd control impulses and closes This key is controllable, 3, and by means of -; control; im and 4plca i first admin8

f: -, .1Y key /. it closes and opens the i-mc second unra-5 LK key 3 Tre; and divides ;;), 6 divides the frequency of the HHOPI01-O signal by m (as a divider 6, the approximate divider is often T; ii;,. L n; xy, g, and the third divider 6 is a sinusoidal signal a) form postuen to shaper 7; Which isop pstklet for mirovanie short g immokg yy of the tertiary phase through zero CH: r; -. ajr sine::; a - :; High divider 5

has a dividing ratio of: i. Thus, on in: the motion of the photo-impeller 8 comes iridically,; - the follower .ICTOTOH

Wg

The AU is the division of the first division of: h, equal to V, then the period of the next is imtullosia lia g by Kchode divider 9

-e -o: mi l ii and i i gain

1;:, an eform of 1, the frequencies j containing successively connected supports of the reiiepaTOp., The first one controlled by jv4:; - i; and the first one, ::; el1- T4 is the frequency, by;: satisfactory ;-( And the second is the second key-1 key and frequency divider; with BpeiieHiibiM kozs) d; i1cI (; division, memory ti, fcip iopov ;; tel impulse;:; nj and; opmipo a-g-eJ: Ü1favl yush {x im.alsov, vs xsd KOTOf Oro is connected to: -; control key and with control; luc-1M input B1-ory key control key, the input of which is connected to the output of the reference generator, which differs from and so, with the aim of expanding di; ; and the frequencies of the input signal; evil. the second divider is introduced — the third one, G-h; -; the analog rostaty and etchi gchetnsh input Cotes cerned with soednken You are a:. C7; pervogt ohm) r; Elit; l-hour Goth; g; ri. The first day the output of the counter is connected; iitiii with information; 1 s. the input of the register g am-gee, the bit code of which is connected to the control | 1km divider input -; .-. S-th-s with: perg; ime 1} Un coefficient, y:; .- heiIa5 ycTaiiGBOv HWe inputs of the first /: sj - HTtjiK often ,. Delkte: 1I frequency with G: c: f: aMeHHfcn-i dedek coefficient and ..: non-tchik and input of the record is Ip para pa m nn obe and are connected to output fog: - | - IeEU control y.sh; their impulses.

31350808

additional installation input of the second frequency divider; entrance

variable frequency divider is connected to the output of the division dividers and the pulse memory register, the input of the driver

combined and connected to the output of the de-pulses connected to the output of the third-frequency frequency inverters with a variable coefficient of the frequency divider, whose input,

The dividing circuit, the input of the driver, is the signal input of the conversion impulses connected to the frequency output device.

Claims (1)

about:> m u _ch a and z gaining A frequency converter comprising a reference oscillator connected in series, a first controllable key and a first frequency divider, a second controllable key and a frequency divider with a variable division ratio, a memory register, a pulse shaper and a control pulse shaper, the output of which is connected to the control input of the first controlled key and with the control input of the second controllable key, the signal input of which is connected to the output of the reference generator, characterized by the fact that, with In order to expand the frequency range of the input signal, a second frequency divider, a third frequency divider and a counter are introduced, the counting input of which is connected to the output of the first frequency divider, with 'h:. the input of the frequency divider with a variable division coefficient, the installation inputs of the first frequency divider, the frequency divider with the larenny division factor and counter and the input of the memory register record are combined and connected s with the output of the control pulses, 1 350808 additional installation inputs of a frequency divider with a variable division ratio and a memory register are combined and connected to the output of a frequency divider with a variable division ratio, the input of a control pulse former is connected to the output of the second frequency divider; the input of which is connected to the output of the pulse shaper, the input of the pulse shaper is connected to the output of the third frequency divider, the input of which is the signal input of the frequency converter. Compiled by Y. Maksimov Editor 0.Golovach Tehred I.Popovich. Proofreader A. Tyasco Order 5297/56 Circulation 900 Subscribed