SU1336039A1 - Multizone scanning converter - Google Patents

Abstract

The invention relates to amplifying devices with pulse-width signal conversion and can be used in analog computers. The aim of the invention is to increase the reliability of operation. The multizone scanning converter contains the first, second and third adders 1, 2 and 3, integrator 4, an odd number of relay blocks 5i, ..., 5n, differentiating elements 6 |, ... 6n, demodulators 7, ... 7n, summing counter 8, zero state decoder of summing counter 9, ring counter 10, load unit 13. The spreading converter operates in self-oscillating mode, the output 12 produces a periodic square wave signal with a pulse-width modulation whose average value is proportional to the signal on ode 11 and participate in the work alternately and sequentially in time all the relay units 5i, ..., 5 "which increases the reliability of the scanning converter. 7 il. "(L y / g / so oo O5 Oh so

Description

The invention relates to amplifying devices with pulse-width signal conversion and can be used in analog computers.

The purpose of the invention is to increase the reliability of operation by ensuring uniform switching of the relay blocks.

FIG. 1 shows a functional diagram of a multi-band sweep, it exceeds the switching thresholds of relay blocks 5i, ..., 5 “.

With the open key 23, the magnitude of the switching thresholds is determined by the ratio of the scale resistors 18-20 for all the relay blocks being the value of Wo.

The resistance value of the scale resistor 21 decreases as the number of relay blocks increases, therefore when

switching the relay blocks 5i, ..., 5n to satisfy the ratio

B, and

In

AT 2

 AT,

Sat, I I Bp

15

E., Cements have a transfer function

T | P

W (P) f pipj former; in fig. 2 - a variant of the execution of the closed-loop CROWNING key 23 thresholds for the transfer of the relay unit; in fig. 3-7 - time diagrams of signals.

The converter contains the first, second and third adders 1-3, integrator 4, relay blocks 5i, 62, 5z, ..., 5 ,,, differentiating elements 6i, 62, bz ..., 6 ", demodulators 7, 72 , 7з, ..., 7 „, summing counter 8, zero state decimator of summing counter 9, ring counter 10, input 11, output 12, load block 13, coils 14, ..., 14 inductances, keys 15i ,. .., 15 ", the first and second tires 16 and 17 of the power supply of the load block, the first, second, third and fourth large-scale resistors 18-21, the current-limiting resistor 22, the key 23, performed on a field-effect transistor, operational amplifier 24, information input 25, threshold adjustment input 26, output 27, potential zero 28.

Pa figs. 3-7 marked:

25

x (t) Y ,, (t)

Yp, (t) -Y, j {t)

Ud | (1) -Udz (1) -

YB | (t) -YB3 (t), x (1) -

Y:. (T) QbQi, Q3Ud (1) signal at input 11; integrator 4 output;

the signals at the output of the relay blocks 51, ..., 5h, respectively; output signals of differentiating elements b1, ..., 6h;

output signals of demodulators 71, ..., 7h; output signal 12; the output of the third adder 3; output signals of summing counter 8; a signal at the output of the decoder of the zero state of the summing counter 9;

YI (t), OUSE (t), VH (t) - output signals of the ring counter 10; - "free level of switching thresholds of relay blocks 5.1, ..., 5p;

CY ± In

The constant time differentiation of 20 1DH elements B1, ..., 6 "is chosen such as to ensure the formation of short duration pulses at their output (Fig. 56) synchronously with the moment of changing the sign of the signal at the output of the corresponding relay unit 5i, ..., 5n (Fig. 5a).

The demodulators 7i, ..., 7n serve to rectify the output pulses of the differentiating elements 6 |, ..., 6 "(Fig. 5c).

Summing counter 8 (for example, non-reversible binary operating in the summation mode) converts the output 30 pulses of the third adder 3 into a binary code (Fig. 3, further limited to three bits of the summing counter 8).

The decoder 9 of the zero state of the counting counter in the simplest case is the element m И -Е, where ш is the number of digits of the summing counter 8, and generates the output signal "Log. "1 when the counter 8 returns to the state Qi Q2 .... Q ,,, 0 (Fig. 3).

The ring counter 10 performs the conversion of the number of pulses at the information input to the ring code when the signal "Log. “O consistently moves from the previous to the next bits, and the number of the log. “1 in the counter is equal to n-1 (Fig. 4).

In the presence of the signal "Log. "On the threshold adjustment input, the switching threshold of the relay unit becomes minimal.

The principle of operation of the scan converter is as follows.

We restrict by consideration, 35

45

i / IV.rIlT.lJlA JJ About "Jl,.,., /, ... jj-t.4 .. i ..... jjt" - .., i, 4 -, .. 11i r, . "Mil

± BI, ± B2, ± VZ are the switching thresholds of the re-one, which are the output signals of the relay block blocks 51, ..., 5z, respectively.

Adders 1-3 have a single transfer coefficient.

Relay blocks 5 |, ..., 5 „have a non-inverting hysteresis loop symmetrical about zero. The level of the signals at the inputs of the threshold adjustment 26 determines em

55

The cokes 5 |, ..., 5h vary within ± A / p ± A / 3, and the maximum signal at output 12 is ± A. We suppose that at the moment of time t: О the signals at the output of the relay blocks 5, ... are equal to A / 3 (Fig. 5e, f, g). Under the action of the signal from the output 12 (Fig. 5h), the signal at the output of the integrator 4 increases in the negative direction and causes switching thresholds of the relay blocks 5i, ..., 5 ".

With the open key 23, the magnitude of the switching thresholds is determined by the ratio of the scale resistors 18-20 for all the relay blocks being the value of Bo.

The resistance value of the scale resistor 21 decreases as the number of relay blocks increases, therefore when

 closed loop junction key 23 switching thresholds of relay blocks 5i, ..., 5n will satisfy the relation

B, and

In

AT 2

 AT,

Sat, I I Bp

five

E., Cements have a transfer function

T | P

W (P) f pipj closed key type 23 thresholds re 5

The constant differentiation time is selected so as to ensure the formation of short duration pulses at their output (Fig. 56) synchronously with the moment of changing the sign of the signal at the output of the corresponding relay unit 5i, ..., 5n (Fig. 5a).

The demodulators 7i, ..., 7n serve to rectify the output pulses of the differentiating elements 6 |, ..., 6 "(Fig. 5c).

Summing counter 8 (e.g. non-reversible binary operating in summation mode) converts the output 0 pulses of the third adder 3 into a binary code (Fig. 3, further limited to three bits of the summing counter 8).

The decoder 9 of the zero state of the counting counter in the simplest case is the element m И -Е, where ш is the number of digits of the summing counter 8, and generates the output signal "Log. "1 when the counter 8 returns to the state Qi Q2 .... Q ,,, 0 (Fig. 3).

The ring counter 10 performs the pre- formation of the number of pulses at the information input to the ring code when the signal "Log. “O consistently moves from the previous to the next bits, and the number of the log. “1 in the counter is equal to n-1 (Fig. 4).

In the presence of the signal "Log. "On the threshold adjustment input, the switching threshold of the relay unit becomes minimal.

The principle of operation of the scan converter is as follows.

We restrict consideration, sch5

five

... jj-t.4 .. i ..... jjt "- .., i, 4 -, .. 11i r,.„ Mil

one that the output signals of the relay blocks

The cokes 5 |, ..., 5h vary within ± A / p ± A / 3, and the maximum signal at output 12 is ± A. We suppose that at the moment of time t: О the signals at the output of the relay blocks 5, ... are equal to A / 3 (Fig. 5e, f, g). Under the action of the signal from the output 12 (Fig. 5h), the signal at the output of the integrator 4 increases in the negative direction and entails a sequential switching of the relay blocks 5 |, 52 (Fig. 5 g, d, e). As a result, the polarity of the voltage at output 12 changes (Fig. 5g, d, e). As a result, the polarity of the voltage at the output 12 changes (Fig. 5) and the signal in at the output of the integrator 4 increases in the positive direction until the time of the operation of the relay unit 5 | (Fig. 5 g, d). At this transitional process ends, the relay unit 5i is in the switching mode, and the relay units Sg, 63 are in static and opposite states (Fig. 5 g-g). The average for the period of self-oscillations the value of the pulses at the output 12 is zero (Fig. 5 h). The presence of a signal at input 11 (Fig. 5 g) satisfying the condition

X (t) 1 I A / 3 1 (2)

leads to a change in the output signal of the integrator 4. In one of the "half-periods of self-oscillations, the rate of change of the output voltage of the integrator 4 is determined by the sum of the signals at the inputs of the first adder 1, and in the other half-period it depends on the difference of these signals (Fig. 5g, g). As a result, the constant component of the pulses at the output 12 reaches a value proportional to the level of the input action.

At time ti (Fig. 6 a), when

I X (t) 1 I A / 3 1, (3)

under the action of the output signal of the integrator 4 (fig. 6 b), the relay block 52 (fig. b b, g, time t2) is reoriented to the state similar to the relay block 5.z (fig. 6 d), and the transition to the second modulation zone (Fig. 6e).

Subsequently, as the signal at input I increases (Fig. 6a), the duty cycle of the pulses at the output of the relay block 5i (Fig. 6b, c) increases, which leads to a corresponding change in the duration of the pulses at output 12 (Fig. 6e) and growth useful component of this signal.

Consider the work with the input blocks.

The parameters of the relay blocks 5:, ..., 5h are chosen so that when the signal is zero at the threshold adjustment inputs, the value of the switching thresholds is ± V0, and in the presence of the signal "Log. "1, when key 23 is closed (Fig. 2), the condition

I B, I 1 B2 I | BZ (4)

where

1 In I I B, |.

We assume that at time point to (Fig. 7a) the signal at the input of the threshold adjustment (Fig. 7k) is zero, and the switching threshold ± Bi of the relay unit 5i occupies the free level of SU Voo (Fig. 7a), which leads to relations

I B, I I B2 I I Su |. (5)

0

In this case, the relay block 5 is in the self-oscillation mode: (Fig. 7 b), and the relay blocks 5 (Fig. 7 c) and 5h (Fig. 7 g) function in a static state.

Summing counter 8 counts the pulses from the output of the third adder 3 (Fig. 7h), which are formed using differentiating element 6 | and demodulator 7 (Fig. 7 d).

When forming the number 8 000 in the summing counter 8 on the output of the decoder 9, a counting pulse and a signal "Log. “O transitions to the second discharge of the ring counter 10 (FIG. 7 L). In this case, the switching threshold of the relay unit 5i is at the initial level, and the response threshold of the relay unit 52 becomes minimal, i.e. condition is met (Fig. 7a)

I B2 I I Bi I I Sat |. (6)

In this case, the relay unit 5i enters the static state (Fig. 7 b), and the relay unit 52 enters the self-oscillation mode (Fig. 7c), thereby ensuring the formation of a pulse flow at the output 12 (Fig. 7n). Count of switching

5 of the relay block 52 is carried out along the corresponding circuit connected to the input of the third adder 3 (Fig. 7e, g). At time t2, when the summing counter 8 returns to the initial zero state, the transfer signal log is generated at the output of the decoder 9. "About the third discharge of the ring counter 10 (Fig. 7 and, l, m), and the switching thresholds of the relay unit 5z occupy the free level of the SU (Fig. 7a), and the response thresholds of the relay unit 52 occupy the initial state 5. When this condition is satisfied

I Sat I I B, I B2 I (7)

and in the mode of self-oscillations there is a relay element 5h (Fig. 7g, g, g, i).

After the totalizer 8 is full, start at time 1,)

 (Fig. 7 and m), the reviewed process is repeated.

Thus, the relay principle of operation of the relay blocks 5 |, ..., 5 is implemented in the sweep converter, when

The number of their switchings is distributed evenly in time, thus ensuring an increase in reliability due to a uniform distribution of power losses between them.

50

Claims (1)

Invention Formula A multizone scanning converter containing the first accumulator connected in series and the integrator, 55 information inputs of relay blocks (where n is an odd number) are connected to the integrator output, the output of each relay block is connected to the corresponding input of the second adder, the output of which is a multi-band deploying converter, whose input is the first input of the first adder, to the second input of which the output of the second adder is connected, the load block, made in the form of a n coil The inductance nuts and p keys, the first leads of the inductors are connected to the first power supply bus of the load unit, the second lead of each inductor is connected to the first output of its corresponding key, the second leads of the keys are connected to the second power supply bus of the load block, characterized in that increase the reliability of operation by ensuring the uniformity of switching of the relay blocks, a sequentially connected counter and a decoder of the zero state of the summing counter, as well as a ring counter, a third adder, n circuits, each of which consists of a differentiating element connected in series and a demodulator, and the output of each relay unit is connected to the corresponding input, its differentiating element, the output of each demodulator to the corresponding an adder, the output of which is connected to the information input of the summing counter of its counter, the output of the zero state decoder of the summing counter is connected to the information input of the ring counter, the outputs of the The ports of which are connected to the threshold adjustment inputs of the corresponding relay blocks, the output of each of which is connected to the control input of the corresponding key of the load unit. 25 ± 28 FIG. 2 FIG. five