SU1334161A1 - Device for computing average value - Google Patents

Abstract

The invention relates to computing. The aim of the invention is to expand the functionality due to the possibility of increasing the sample size. The device for calculating the average value contains the generator, register, and m steps of the modules, where m is the total sample size. The device operation algorithm is described by the recurrent formula T n, X T-K I + m where f, is the average value of the current sample and the sample without taking into account the accumulation of its last members by the module of the previous step, respectively; X, - is the next sampling value; K. p - the volume of the sample module of the previous stage; m is the current total sample size. 2 Il. (L oo oo

Description

 one

The invention relates to computing and can be used as an attachment to a digital computer, digital measuring and other devices for calculating the average value of random numbers of the required sample size.

The purpose of the invention is to expand the functionality due to the possibility of increasing the sample size.

Fig. 1 shows the functionality of a single device module circuit for calculating an average value; Fig. 2 is a functional diagram of the device for calculating the mean value, n.

The module contains (Fig. 1) adders 1 - 4, registers 5 and 6, counter 7, divisor 8, input 9 of the average value calculated by the module of the previous stage, input 10 of the sample size provided by the module of the previous stage, sync input 11 from the previous stage, output 12 of the average value calculated by the module of this stage, output one 13. The sample volume provided by the module of this stage, sync output 14 from the module of this stage, total clock input 15 of the entire device and input 16 of the total installation of the device.

The device for calculating the average value contains (Fig. 2) a pulse generator 17, a register 18, an input 19 of processing data, modules 20, an initial installation input 21 and a result output 22.

The invention consists in the use of a number of simple average value calculators with a limited sample size for organizing calculations of the average value of a multiply larger amount of the analyzed data.

The device is based on a modified formula for recurrent calculation of the average value:

 x

tk

4. .in; Jii m

(I)

Xj, is the mean value, respectively, of the current sample and the sample, excluding its last K members;

de

TO

X. - the next value of the sample;

K is the sample size of the module of the previous stage;

m is the current total sample size, equal to m, + K; , - the limit of K- (K

), such that upon reaching. a fixation of the next value of X "occurs; S is the number of times when

the mean was refined.

When K t reaches the value T. we have

m, K 5 K „,, + Cd,„ ,,

 (S + 1) -K

Max

Then formula (1) can be converted to the following form:

Y-y 4 .-- i-

.1- S - Q + 1 5 + 1

where Xs +, X „;

Xg - X -

- the value of the partial average with a sample size equal to the calculated individual

module

K-1

5 y (: 1) + -is k К-1 К К

where Xj Xp, () + -f-, etc.,

where Xg and X can be the next average value calculated by the previous module to calculate the average value. For modules of the first stage, the input processing data stream is taken as X. A general formula for calculating the average number of random numbers

 x, .v, (5: i -) - lix .., (,, ((: 1-Ь-1- (х ..,:

- +

The formula can be extended to an unlimited number of steps of consecutively included modules.

The common divisor that determines the amount of sample to be processed, in this case, is determined by the dividers provided by each module, and the maximum sample size, when

 / lac max max equals

S

 TO

where t is the number of steps of sequentially included modules: to calculate the average value.

Thus, if there are several simple modules for calculating the average value with a restriction on the sample size, it is possible to build devices with a virtually unlimited amount of data to be analyzed.

The module for calculating the average value works in accordance with formula (1) as follows.

Before processing the input data, all elements of the modules that can store information are reset by the initial preset signal from input 16.

The input data X. from input 9 is fed to the first input of adder 1, to the second input of which comes the inverted value () of the previously calculated average value from the inverse output of register 6. To obtain an addition to the value of X "to the input of the least significant bit cm mmator 1, units

At the output of adder 1, the difference X.J - X, is obtained, which is fixed in register 5 and fed to the input of divisible divider 8.

Register 5 serves to accumulate

-KT

sums Z (X--) and is synchronized from the input by 15 pulses of an external oscillator common to all modules of the device. Registers 5, one in each module, form an input information processing pipeline, which allows finding out the exact value of the average through the number of pulses, corresponding to the number of stages in the device, since the last information word entered the device.

ten

 .

15

20

25

thirty

35

40

45

50

55

(which summarizes

Counter 7 counts the number of transitions S of the sample size K in the module of the previous stage through KK., Coming from the input 1 1. The overflow signals of the counter 7 module of this stage synchronize the operation of the module of the next stage. The contents of counter 7 are summed with the sample size K provided by the module of the previous stage at adder 4, from the output of which the sample size t provided by the module of this stage is fed to the input 10 of the module and the splitter input divider 8 .. At the output of divider 8, we get the value

Kg

 i 1 $ ls-1 1. m

on the adder 3 with X. incoming from the direct output of register 6. The next value of X is recorded in register 6 according to the signals synchronizing counter 7 and coming from input 11, when in the counter of the module of the preceding stage K K.

The pulses of the oscillator 17 are synchronized both with the data for processing through the register 18 and with the operation of the entire device calculating the average value.

The input 21 of the initial installation of the device is connected to the inputs 16 of the modules 20., 20j, ..., 20 of all stages and the reset input of the register 18, the output of which is connected to the input 9 of the module 20, of the first stage. The processed data is directly transmitted to this input. Zeros are fed to the input 10 of the module 20 of the first stage, since there has not yet been an averaging sample to this stage.

If there is enough sample size provided by one module 20 of the first stage, then from its output 12 it is possible to read the result obtained in the process of averaging the input data.

If it is necessary to process a larger sample size, the outputs of the first-stage module 20 connect the inputs of the second-stage 2Gj module. As a second-stage module, the module of any subsequent connected stage must be connected by its inputs to the previous stage's outputs in the following order: input 9 the module of the connected stage must be connected to the output 12 of the

blew a stage; the input 10 of the module of the connected stage must be connected to the output 13 of the module of the previous stage; the input 11 of the module of the connected stage must be connected to the output 14 of the previous stage.

The output 22 of the result of operation of the device with multi-stage processing is the output 12 of the average value calculated by the last stage of the device.

The device works as follows.

Before starting work on register 18 and. modules 20, 20, .., 20, through the circuit 21, a pulse of the initial installation comes, bringing the device to its initial state. The processed data stream is received by register 18 at a rate determined by the output frequency of the pulse generator 17.

The data received by the register 18 is fed to the data input 9 of the module 20, the first stage for calculating the average value. They are accompanied by pulses from the generator 17, which are fed to the synchronization input 11 of the first stage module 20. At the same time, the output frequency pulses of the generator 17 are post-connected to the clock inputs of the 15 modules 20, 20,. .. ,20. . steps, providing a calculation of the current average value.

After, the processing cycles at the output 14 of the synchronization module 20 of the first stage, a pulse appears that arrives at the synchronization input 1I of the module 20 of the second stage and causes it to register in its register 6 the next value

X module 20 of this second stage. The next tact of fixing the next X, module 20 of the second stage occurs only through. To, the generator clock 17 pulses.

 - f

The fixations of Xfr, by the module of the last stage, are performed similarly, but the processing rates (the frequency of synchronization pulses at its input 11)

: t-i

VC

make

less time.

The result at the output of module 20 of the last stage appears through

M x clock cycles, accompanied by a signal from its output 14, the current average value of the processed data array can be read continuously from the last 12 stages, but at the same time

The next data word received for processing influences the output result, only through t clocks of the 17-pulse generator. This is connected with the pipelining of the processing of registers of 5 modules of each stage.

Claims (1)

Invention Formula A device for calculating an average value comprising a pulse generator and a register, the output of the pulse generator connected to a synchronized input register, whose information input is connected to the data input of the device, the input of the initial installation of the device is connected to the input of the register setting, and In order to expand the functional capabilities due to the possibility of increasing the sample size, t levels of modules were entered into it (where t is the total sample size in the form of a measure of the degree of sample size of one level, each of which contains the first, second , third, fourth adders, first and second registers, a counter and a divider, with the first information input of the first adder of each stage connected to the input of the calculated average previous stage, the second information input of the first adder connected to the inverse The output of the first register, the installation input of which is connected to the installation input of the second register, the installation input of the counter and the installation input of the device, the input of the logical unit of the device are connected to the transfer input of the first adder, the output of which is connected to the first information: the input of the second adder, the second information input connected to the output of the second register and the first input of the divider, the output of which is connected to the first information input of the third adder, the second information input of which With the direct output of the first register, the information input of which is connected to the code of the third adder and the calculated average of this device’s stage, the counting input of the counter is connected to the clock input of the first register of each stage and the synchronization input from the module of the previous stage of the device, the output of the pulse generator is connected to syncro 113341 the inputs of the second registers of modules of all stages, the information input of the second register is connected to the output of the second adder, the input of the sample volume of the previous stage of the device is connected to the first information input of the fourth adder of this stage, the output of which is connected to 618 the second input of the divider and the output of the sample size of this stage of the device, the second information input of the fourth adder is connected to the output of the result of the counter, the overflow output of which is connected to the synchronization output from the module of this stage. / Modil preya with / lupeni steps Modi // f6 Cflfdi / tier K Steps f (/ in. G