SU1332445A1 - Device for protecting a three-phase electric installation against operation on two phases and against reversed alternation of phases - Google Patents

Abstract

The invention relates to electrical engineering. The purpose of the invention is to increase the reliability of protection in the event of a break in the supply phase during group operation of at least two three-phase consumers. The device contains a current analogue 7 of the load connected to the network through current transformers 1-3, a phase-sensitive unit 8, a switch 9, a threshold unit 10, a series of pulses converting unit 15, an indication unit 20 and an actuating element 21. The protection reliability is achieved by the introduction of unit 13 combining a pulse, a pulse shaping unit 14 of two logical elements ZI 12 and 15, an inverter 17 and a second pulse converting unit 16. The pulse converting unit 16 is made on five OR-NOT elements, two diodes and two capacitors .. 1 s.p. f-ly, 7 ill. % (L J - I I Ibfenputop rupfn / ufcp ruponpufop Ch1ch | MufaJium Hatfjijxu tuponputopof with 00 GCHE N 4 ate

Description

The invention relates to electrical engineering, in particular, to devices for monitoring and protecting a three-phase electrical installation from two-phase operation and reverse phase alternation.

The purpose of the invention is to increase the reliability of electrical installation protection in the event of a phase failure of the supply voltage during group operation of at least two three-phase consumers.

. FIG. 1 shows a block diagram of the proposed device; in fig. 2 is a diagram of a pulse combining unit; in fig. 3 is a block diagram of the formation of a series of pulses in the formation of pulses; in fig. 4 - schematic logic level, output of the second phase-sensitive unit; on the left of the conversion unit 16 of FIG. 5 is a diagram of the first and second conversion units, a series of pulses.

pulses into a constant logic level connected to the input of the third 20 inverter 17 and the display unit 20, the output of the threshold element 10 and the first unit 11 of converting a series of pulses into a constant logic level through the second inverter 18 and

to constant logic level; in fig. 6 and 7 are timing diagrams explaining how blocks work.

The device for protection of three-phase electrical installation contains auxiliary current transformers 1-3, input-25 the first inverter 19 is connected to the unit

current transformers 4-6, current analogue of load 7, phase-sensitive unit 8, switch 9, threshold unit 10, first unit 11 for converting a series of pulses into a constant logic level, first logical element ZI 12, unit 13 for combining pulses, unit 14 pulse formation, the second logical element ZI 15, the second block 16 converting a series of pulses into a constant logic level, the third inverter 17, the second inverter 18, the first inverter 19, the display unit 20, the executive element 21.

The primary windings of the input 4-6 and auxiliary 1-3 current transformers are connected one by one to the phase and connected to the supply mains, while the other leads are connected to the protected electrical installation and the analogue load 7, respectively. The secondary windings of the auxiliary 1-3 and input 4-6 current transformers through the contacts of the switch 9 are connected to the phase-sensitive unit 8, the output of which is connected to the control input of the switch 9 The output of the phase-sensitive unit 8 is connected to the threshold element 10, the output of which oedinen with pulse series input of the first conversion unit 11 at a constant logic level, the outputs of the threshold element

10 and the first conversion unit 11 are connected to the input of the first logical element ZI 12.

The pulse combining unit 13 is connected to the secondary windings of the input current transformers 4-6, and the output of the pulse combining unit 13 is connected to the input of the pulse shaping unit 14, the outputs of which are connected to the inputs of the second logical element ZI 15, and the output of the second logical element ZI 15 is connected to the input the second block 16 converting a series of pulses into a constant logic level, the output of the second block 16 converting a series

pulses into a constant logic level connected to the input of the third inverter 17 and the display unit 20, the output of the threshold element 10 and the first unit 11 of converting a series of pulses into a constant logic level through the second inverter 18 and

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ku 20 indications. The output of the third inverter 17 is connected to the third input of the first logic element ZI 12.

The device works as follows.

When the device is turned on into the mains through the current analogue of the load 7 and the auxiliary current transformers 1-3 the current flows, the auxiliary transformers 1-3 generate pulses that, having passed through switch 9, fall on the corresponding inputs of the phase-sensitive unit 8, the switch 22 should in the on state.

If the phase alternation in the supply network is correct at the output of the phase-sensitive unit 8 (Fig. 4) has 0

from a high logic level, which is fed to the input of the threshold element 10, and from the output of the latter, a single signal is fed to the first block 11 of converting a series of pulses into a constant logic level. As a result, a single signal from the output of the threshold element 10 is fed to one input of the first lot of the ICP element 12, and since they are absent at the input of the first block of the pulse train to a constant logic level, to the second input of the first logic element

also comes a single sigzi 12 cash.

During group work of several three-phase consumers, containing, for example, hydraulic motors in electrical installations, when the common phase is disconnected, the underloaded overclocked hydraulic motor / rotor continues to rotate; .

The inclusion of the pulse combination unit 13 in the phases of the three-phase power supply network (Fig. 2) allows, at a symmetrical three-phase voltage system, to supply three pulses to the input of the pulse shaping unit 14 at the same time. In the pulse shaping unit 14 (Fig. 3), the pulse duration in each phase decreases, and then the pulses without a phase change arrive at the input of the second logic element ZI 15 while simultaneously the device from the output of the second logic element ZI 15 to the input of the second pulse conversion unit 16 a constant level logical sequence of pulses, the second conversion unit 16 series of pulses into a constant logic level through, the third inverter 17 outputs to the input of the first logic element ZI 12 high logical level, and if the remaining two inputs of the first logical element ZI 12 receive the same two high logic levels, which corresponds to the fact that a current flows through the three phases of the electrical installation, the alternation of the fae of the three-phase mains supply is not reversed, the first logical element ZI 12 through the actuator 21 connects the electrical installation to the mains.

If during the operation of the electrical installation a single phase is interrupted, into which the output transformer 5 is connected, the actuating element 21, similarly to the case of reverse phase alternation, disconnects the electrical installation from the supply network and generates a signal to the switch 9, which disconnects the inputs of the phase-sensitive unit 8 from the secondary windings of the transformer 50

If the three-phase supply network forms an asymmetrical three-phase voltage system, the output of the pulse combining unit 13 through the pulse shaping unit 14 to the input of the second logic element ZI 15 is not postgg mated 4-6 and connects them to the secondary three simultaneous pulses auxiliary trans-, from the output of the second logic element 1–3 current, the mentor ZI 15 makes a low logical value. Since through analogue 7, the load is level. Low logic Uro through all three phases current flows.

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It enters the input of the second pulse-series converting unit 16 to a constant logic level, and from the output of the second pulse-converting unit 16 to a constant logic level, the input of the third inverter 17 and the display unit 20 receives a high logic level. As a result, a low logic level is supplied to the third input of the first logic element ZI 12 from the third inverter 17. The first logic element GI 12 disconnects the electrical installation from the mains supply, simultaneously received from the output of the second pulse series 16 conversion unit to a constant logic level, a high logic level in the display unit 20 signals the emergency mode.

If the alternation of the phases of the mains supply is reversed, a logic signal O is generated from the output of the phase-sensitive unit 8 at the end of the threshold element 10, and the LED of the display unit 20 lights up through the second inverter 18. The two inputs of the first logical element ZI 12 receive a signal of logical O, the first logical element of ZI 12, through the actuating element 21, switches off the electrical installation. From the output of the phase-sensitive unit 8, a signal is generated to the switch 9, which disconnects the inputs of the phase-sensitive unit 8 from the secondary windings of current transformers 4-6 and connects them to the secondary windings of auxiliary current transformers 1-3. Since the phase rotation of the supply network is also reversed, the electrical installation remains disconnected from the supply network.

If, during the operation of the electrical installation, a single phase is interrupted, into which the output transformer 5 is connected, the actuating element 21, similarly to the case of reverse phase alternation, disconnects the electrical installation from the supply network and generates a signal to switch 9, which disconnects the inputs of the phase-sensitive unit 8 from the secondary windings of the input transformer0

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g mators 4-6 and connects them to the secondary windings of the auxiliary transformers 1-3 current, Since through the analog 7 load in all three phases current flows.

the input transformers 1-3 are re-connected to the mains and disconnected if the plugs are not eliminated. As a result, a periodic signal is generated at the output of the phase-sensitive unit 8, which, by the first block 11 of converting a series of pulses into a constant logic level, irrespective of the logic level at its input, outputs a constant zero logic signal. The input of the first logic element GI 12 from the output of the first block 11 converting a series of pulses into a constant logic level enters the logic O and the actuator 21 keeps the electrical installation off and off for the time of phase failure in the supply network. At the same time, a single logic signal from the first inverter 19 is fed to the display unit 20, the input of which receives a zero logic signal from the first pulse-series conversion unit 11 to a constant logic level. The display unit 20 signals the break of the phase of a three-phase mains supply.

If necessary, the switch 22 can be used to disconnect the electrical installation from the mains. In this case, one of the inputs of the phase-sensitive unit 8 does not receive a signal from switch 9. At the output of the phase-sensitive unit 8 there is a low logic level, the actuating element 21 switches off the electrical installation,

One example of a specific implementation of a phase-sensitive unit 8 (Fig. 4) may be to perform it on RS and 1K triggers, the output of the trigger is connected in series through a capacitor with a rectifier and amplifier, and the output windings of two, for example, auxiliary transformers 1 and 2 connected to the inputs R and S of the RS-flip-flop, the output of which is connected to the input C of the IK-flip-flop, and the output winding of the third auxiliary transformer 3 is connected simultaneously with the inputs of the JK-flip-flop, the output of which through a capacitor is connected to a rectifier and an amplifier.

We first consider the algorithm of the 1K-trigger operation. Transition from one sos

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then nothing happens only at the moment of potential change at the input C of the positive (one,) to zero, i.e. the back front, if during the action of the positive potential at the entrance C, there is or there is a positive potential at the information inputs I and K, which causes the trigger to switch to the opposite state.

The arrival of a positive impulse to input I, when there is a positive potential at input C, prepares the trigger to go to state 1 at the output, the arrival of a positive impulse to input K prepares the trigger to go to state O at the output, the arrival of polarizing pulses to inputs I and K simultaneously prepares a trigger transition to the opposite state.

The arrival of pulses in any specified combination at the inputs I and K with

25, the zero potential at input C does not affect the further state of the trigger, i.e. in this case, as in the case of the complete absence of pulses at the inputs I and K, the rear edge of the pulse at

Input 30 M does not translate the trigger to another state.

The operation of the RS flip-flop is that a positive pulse at the input R and zero potential

-jg at input S causes the trigger to go to the zero state, and a positive impulse at input S and zero potential at the input R put the trigger to one state (positive

4Q output potential).

The principle of operation of peak transformers is that, when a sinusoidal current passes through the primary winding, voltage pulses appear on the secondary winding at the moment when the phase current passes through zero.

Let the correct phase rotation correspond (Fig. 6) to the sequential appearance of pulses in the output windings of auxiliary transformers 1 - 3 (Fig. 6a-b) in the order A, B, C, and let at the moment t, IK trigger is in the unit state, then after the arrival of the pulse at the time t at the input R of the RS flip-flop, the latter switches to the zero state (4, Fig. 6). At time t., After the arrival of a pulse at the input

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S RS-trngger, the trigger goes into one state, which is maintained until t4, which corresponds to the arrival of a new pulse at the input R of the RS flip-flop, after which it goes into the zero state. This will be repeated every period (Fig. 6g

The diagram shows that such a sequence of pulses (such an alternation of phases) corresponds to the appearance of a positive potential at the output of the RS flip-flop for most of the period, namely, 2/3 of the period.

If you reverse the phases A and B, you can see that the phase B pulses translate the RS flip-flop into zero state, the phase A pulses into one state (Fig. 6) and this phase rotation corresponds to the appearance of a positive potential at the output of the trigger on 1/3 period.

Taking into account that the output of the RS flip-flop is connected to the input C of the IK-flip-flop, and, considering the diagram further, it can be established that, with the correct phase rotation, the appearance of a pulse in phase C, i.e. at the outputs I and K of 1K-flip-flop, corresponds to the presence of a positive potential at the input of the C 1K-flip-flop, i.e. when the potential at input C changes from 1 to O at times t

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t And since the 1K trigger switches after each period and at its output there is an alternating voltage with a frequency two times lower than the frequencies of the supply network (Fig. 6e).

If the phase rotation order is reversed, then a positive impulse at the input I and K of the 1K-flip-flop appears at the moment of zero potential at the input of the C 1K-flip-flop and the latter is not ready for switching due to which it does not switch at the moment of time t, t, and so on, and at its output there is either a zero potential or a positive potential (Fig. 6 g), which is not passed further by a capacitor.

If any of the phases of the supply voltage is broken, phases A or B, positive pulses are missing at the input of R or S of the RS flip-flop and the RS flip-flop does not switch, i.e. At the input of the C 1K flip-flop there is no voltage drop and it also does not switch, despite the presence of pulses from phase C to

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inputs I and K. If phase C terminates, then there are no positive pulses at inputs I and K, the 1K flip-flop is not prepared for switching and does not switch, and there is a constant potential at its output that is not passed further by the capacitor. A break in the output windings of transformers 1-3, a failure of the RS flip-flop or 1K-flip-flop of the phase-sensitive unit 8 causes the low logic level from the output of the phase-sensitive unit 8. One specific example of the implementation of the pulse combining unit 13 is to perform it on active filters built on the basis of operational amplifiers (OA), which are used as phase shifters (Fig. 2).

Consider a simple all-pass filter circuit. Its transfer function is equal to the ratio () and

5 (p S + 1), where T RC. The complex transfer coefficient corresponding to this function is of the form e, where Of and- - 2 arcts (2 irfc) ..

Thus, at any frequency values of the input signal of the resistor, the output voltage of the converter is modulo the input voltage, and the phase is shifted relative to the input by the angle. At a constant frequency f, by changing the resistance of the resistor R from zero to very large values, it is possible to adjust the angle q) from 1G to a value almost equal to zero.

In block 13 of the combination of pulses in phase C, an inverting amplifier is additionally installed in front of the phase shifter built on an op-amp, the op-amp here is covered by parallel OOS

5 to a voltage that allows the phase to be inverted by an angle cf li. The pulse combining unit 13 makes it possible to combine three phases using inverters that shift the phase by a constant angle

0 × set by resistance R when adjusting the device. The operation diagram of the pulse combining unit 13 is shown in FIG. 7

One of the specific examples of the execution of the pulse shaping unit 14 is its execution on three elements of an IS-IC and a capacitor (Fig. 3). Short pulses are generated by using delay

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ki in logical elements. The diagrams below summarize the principle of operation of the pulse shaping unit 14 (Fig. 6).

One specific example of the implementation of the first unit converting a series of pulses into a constant logic level (Fig. 5) is to perform it on five OR-NOT elements, two diodes and two capacitors, the input terminal of the first unit 11 converting a series of pulses into a constant the logic level is connected to the input of the first element OR NOT, the output of which through the first diode and the second element OR NOT connected in series to the first pass of the third element OR NOT, the output of which through the fifth element OR is NOT connected to you In the course of the first block 11 of converting a series of pulses into a constant logic level, the second input is connected via a second diode to the input terminal of the first block 11 converting a large number of logic pulses into a constant logic level, and parallel to the inputs of the second and fourth tJiCMenTOB OR the first and second capacitors.

If a sequence of pulses arrives at the input of the first block 11 of converting a series of pulses into a constant logic level, then the output is a zero signal. If pulses are not received to the code, then regardless of the level of the input signal (O or 1), the output of the first unit 11 of the series of pulses into a constant logic level is at the unit level.

The second unit 16 for converting a series of pulses into a constant logic level is made similarly to the first unit 11 for converting a series of pulses into a constant logic level.

The use of the proposed device in comparison with the known protection device ensures reliable protection of an electrical installation containing a group of three-phase consumers, such as hydraulic motors, with a faulty power supply network, provides a CEC visual indication of any emergency power supply mode.

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Since the proposed device is not predictable for independent use and cannot give a direct economic effect, but is used as a protection device for various three-phase electrical installations, the effect of using the proposed device depends on the importance of the tasks performed by the installation being protected.

Claims (2)

Invention Formula 15 1. A device for protection of a three-phase electrical installation from two-phase operation and reverse phase alternation, containing input and auxiliary current transformers, the primary windings of which are connected to each other in one phase and connected to the supply mains, and the other terminals are connected respectively to the protected one electrical installation 25 and to the current analogue of the load, the secondary windings of said transformers are connected via switch contacts to a phase-sensitive unit, the output of which is connected to 0 to the control input of the switch and connected to the actuating element, the first unit for converting a series of pulses into a constant logic level, a threshold unit, two inverters the torus and the display unit, the output of the phase-sensitive unit is connected to the threshold unit, and the output of the threshold unit is connected to the input of the first unit for converting a series of pulses into Q constant logic level, the outputs of the threshold unit and the first unit converting a series of pulses into a constant logic level through inverters are connected to an indication unit, characterized in that, in order to increase the reliability of the electrical installation protection when the nHTaiqinero phase voltage is disconnected during group work at extreme at least two three-phase consumers, additionally, a pulse combining unit, a pulse shaping unit, two logical elements of the GI, a second pulse-series converting unit into a constant logical level, the third inverter, wherein the alignment unit is connected to the pulse input secondary windings of current transformers, and output alignment block pulses connected to the input of the pulse shaping unit, whose codes are connected to the inputs of the second logic element GI, whose output is connected to the input of the second block of converting a series of pulses into a constant logic level, the output of the third inverter is connected to the third input of the first logic element GI, the output of the threshold unit is connected the second input of the first logic element GI, and the output of the first unit converting a series of pulses into a constant logic level is connected to the first input of the first logic element GI, the output of the second unit for converting a series of pulses into a constant logic level is connected to the display unit and to the input of the third inverter, and the output of the first logic element GI is connected to the control unit. 2. The device of claim 1, wherein the unit for converting a series of pulses into a constant logic level is implemented on five OR-NOT elements, two diodes and two capacitors, the input terminal of the unit being connected to the input of the first element OR NOT, the output of which is connected through the first diode connected in series and the second element OR NOT connected to the first input of the third element OR NOT, the output of which through the fifth element OR is NOT connected to the output of the block and the second input of the third element OR NOT connected through the second diode to the input terminal b eye, wherein the parallel inputs of the second and fourth OR-NO elements are connected a first and a second kondensatorysootvetstvenn Fmg.Z Fu, .i / Of / 5) Scp) 5