SU1327116A2 - Device for mating - Google Patents

Abstract

The invention relates to computing, is intended to interface elementary machines into a homogeneous computing system and is an improvement of the device according to the author. St. No. 913360. The aim of the invention is to expand the class of tasks to be solved by monitoring the state of system busbars to enable reconfiguration of a homogeneous computing system. The device provides control of the state of the control 14 and informational 15 bus lines, and when an emergency situation occurs in them (for example, when one or more transmitting amplifiers of the switching unit 1 are out of operation) from the output 30 of the trunk state decoding unit 12 to the input of the block 13 the channel is blocked by a control signal, by which unit 13 turns off the power of the switching signal I glare via its input 31, when a control signal is received from the trigger 6 of the sign, if it confirms ... 5 .- g (L bo INS N) (fJui.t

Description

A malfunction in the output amplifiers of the switching unit of this device for interfacing. In addition, from output 30 of block 12 through interrupt block 0 and communication gan 18 with micro1

The invention relates to computing and can be used to combine individual roEVs into a homogeneous computing system.

The aim of the invention is to extend the class of tasks to be solved by monitoring from the backbone busbar to reconfigure a homogeneous computing system.

FIG. 1 shows a block diagram of the device; FIG. 2 is a block diagram of an interrupt unit; FIG. 3 is a block diagram of a block of control of a trunk; in fig. 4 - block diagram block channel. ..

The device (Fig. I) contains a switching unit 1, a setting unit 2, a register address decoder 3, a system synchronization trigger 4, an interaction register 5 a characteristic trigger 6, a channel grant trigger 7, a channel requirement trigger 8, a state register 9, a preload block 10 , the address register P, the trunk condition decryption unit 12, the channel blocking unit 13, the device's first input-output bus 14, the second device's input-output bus 15, the switching information output control bus 16, the switching output information bus 17, shi 18 of the third input-output device, the control address input 19 of switching unit 1, the control information bus input 20-23 of the switching unit I, the inputs 24-27 of setting 2, the outputs 28 and 29 of setting 2, the 30 of block I2 and 3I power input of switching unit 1.

Interrupt unit 10 (FIG. 2) may be implemented as an element OR 32 and trigger 33,

The computer dispatcher of the system proceeds to the program of searching for the disconnected elementary machine and rebuilding the system, which provides an automatic way out of the emergency. 4 il.

The block I2 for de-embracing a trunk state is intended for fixing a comment of a signal of a logic unit level on one of the bus lines.14 if there is a logic zero level on all 15 bus lines or a moment of logic unit level appearance on one of the bus 15 lines on All lines are wide 14 level logical zero.

Block 12 (FIG. 3) of the control may contain comparison circuits 34 and 35 and the element SPARING OR 36. The inputs of the comparison circuit 34 must be connected to the lines Ср5 (signal of translational exchange), Сg (signal of individual exchange), Сц ( signal settings) and Cj5 (address signal) bus 14, and to the inputs of the circuit 35 comparison - the corresponding lines of the information word bus 15.

The channel blocking unit 13 is intended to disable the transmitting MUSI. units of switching unit 1 from buses 14 and 15 by turning off the power of the equipment of switching unit 1 when signals from block 12 and trigger 6 are received,

Block 13 (Fig. 4) may contain an element And 37, trigger 33, element OR 39 and relay 40.

The device works as follows.

In a system or structure built using the device, when the device cooperates with the microcomputer associated with it, 40 the following set of system operations is performed: setup, exchange, generalized conditional transfer synchronization, and generalized unconditional transfer. In addition, the device implements the operation

45 diagnostics and output locks

amplifiers of switching unit 1 in the event of a malfunction.

The tuning operation consists in connecting the device through the switching unit 1 to the buses 14 and 15 and assigning each microcomputer a logical address. When setting up the device, it is necessary to enter the setup information in the block

2and the logical address of the microcomputer in the register 1I. From the output 28 of the unit 2 to the input of the unit 1 information is received that permits the passage of control and information data from the buses 14 and 15 to the buses 16 and 17 or from the buses 18 and 20-23 to the buses 14 and 15 of the device.

The tuning information in block 2 can come from the microcomputer to the input 25 connected to this device via bus 18 at the permission at input 27 or from another microelectric computer through bus 14 and input 26 when there is permission on the control bus 16 to input 24 through the switching unit I.

The logical address of the microcomputer into the register 11 can come from the microcomputer connected to this device via bus 18 when the decoder is enabled

3 or from another microcomputer via bus 17. with permission via control bus 16

After setting up all the devices in the system, which are connected with it and forming the microcomputer subsystem, they proceed to the execution of a parallel program. In the process of execution, the microcomputer parallel program subsystem exchanges information with each other. In the system constructed using the proposed device, both group and individual exchanges can be realized, and from group translations are implemented, before which the microcomputer of the subsystem is synchronized.

The Sync operation is performed as follows. The microcomputer, having completed the work on the program (subroutine) of the parallel branch, sets trigger 4 according to the installation signal from bus 18 and resolution of decoder 3 into a single state and proceeds to poll the corresponding register bit 9. From the output of trigger 4 to input 21 unit 1 receives a partial synchronization signal. At that moment, when all the triggers of the 4 devices of the subsystem are installed

into units, the system synchronization signal is generated in the blocks, which from the output of block 1 via bus 16 enters the corresponding register bit 9. The microcomputer, after analyzing the state of this bit, register bit 9, determines that the synchronization is complete and passes to the next stage of parallel computing.

The computer, whose program provides for the implementation of a translational exchange (transmission), performs the following actions. The microcomputer sends, via bus 18 to the decoder 3, a code corresponding to the operation of translational exchange, and via bus 20 from the output of the decoder 3 to block 1, a signal is received from the system translational exchange

on (). The information word read from the microcomputer's memory, via bus 18, goes through block 1 to bus 17. In receiving devices, signal C comes from bus 14

through block 1 via bus 16 to the input of register 5, allowing the information word of the bus 17 exchange to be written into it. Simultaneously with this, the signal comes from the output of block 1 of switching via bus 16 to the corresponding register bit 9, From register 9, information is read through bus 18 the microcomputer, which analyzes the bits of the register 9. Having determined that the translational exchange operation is being performed, the microcomputer reads the information word into its general register (the data is perceived as data) via bus 18 from the interaction register 5.

In the case of an individual exchange of a microcomputer, in the program of which the operator of an individual exchange consists, performs the following actions.

The bus 18 and at the resolution of the decoder 3 to the trigger 8 put the signal of the demand of the system channel - one.

From the output of the trigger 8, the signal signal of the system channel is fed to the input of the trigger 7 and is recorded into it at the time of the resolution from the trigger output 6 and the presence of the enable signal from the output of block 1, indicating that the system channel

5132

is free. From the output of the trigger 7, the signal of the system channel (Cj) enters the corresponding bit, the state register 9 signals the microelem about the channel assignment, and through the switching unit 1 switches to the I4 bus.

On the bus 14 signal Cj. comes through switching blocks I to buses i 6 and to inputs of flip-flops 7 of all other devices of the subsystem and keeps them in the zero state. From the output of trigger 7, the busy signal (zero) is written to state register 9 J signaling with these devices - you are a microcomputer about system channel occupancy.

After the microEVN sends the channel request signal, it proceeds to analyze the contents of the state register 9 and, when the channel grant signal is received, sends the code corresponding to the individual exchange operation via bus 18 to the decoder 3, and from the output of the decoder 3 via the bus 20, the switching unit 1 receives an individual exchange signal,

  The Cp5 signal is fed through the buses 16 in the receiving devices to the input of the state register 9, and the corresponding bit is entered to U. The signal Cpj also goes to the input of the unit 10, from which the bus 18 goes to the microeV to the breakdown signal. The microcomputer goes to service the device, counting the contents of state register 9 on bus 18, and determining that an individual exchange operation is taking place, reads on bus 18 from register 1 a logical address and prepares to read information from register 5,

Capturing the system channel, micro

The computer, in nporpaNn ie which the operator of the individual exchange is recorded, sends on the bus J6 the address of the microcomputer with which it must interact. This address from bus 15 through block 1 via bus 17 and with resolution on bus I6 (Cj, 5) is entered into registers 5 of the interaction of all devices of the subsystem From register 5 via bus 18 the microcomputer reads this logical address and compares it with its own logical addresses do not match, then the microcomputer continues to work

66

by parallel progamme, and if its own and received logical addresses are the same, the microcomputer is prepared to perform an individual exchange, which takes place between two micro-computers in the presence of a control signal,

After the individual exchange is completed, the microcomputer initiating the exchange sends bus 8 and, if there is permission from the decoder 3, writes to the trigger 8 a release signal for the channel, which enters the trigger 7 and from its output into the corresponding bit of its register 9 and bus 23, Block 1 transmits to pguin 4 a signal from bus 23, which is entered into triggers 7 of all other devices of the subsystem, allowing other micro-computers of the subsystem to occupy the channel,

A channel demand signal may occur simultaneously in multiple devices. To exclude the possibility of a conflict, t, e, that the system channel is represented at each time moment only by one microcomputer triggers of the system b are connected in a chain, forming a shift register through which 1 circulates. If the channel is free, it is provided only to that microelectric device in the device for conjugation of which the signal of the channel requirement and 1 in the shift register trigger 6 are the same at the moment. Since the occurrence of a request for a channel (a channel's demand signal) is in no way synchronized with the frequency of movement 1 in the shift register, then the provision of the channel in the case of a simultaneous request for it by several micro-computers is pseudo-random.

Other microcomputers are waiting until the channel is released and. will be provided to the nearest of the following microcomputer chain,

In the event of an emergency situation bus i 4 or .15, the latter is automatically eliminated by the device as follows.

An emergency situation may occur in bus 14 or 5 in the event of the failure of one transmitting amplifier of a block or other element of a device; associated with transmitting amplifiers. An unregulated active level is set in the corresponding lash i 4 or 15 line.

which distorts information in all tires 14 or 15 devices for interfacing the system. Protection against an emergency in tires 14 or 15 is based on the fact that during normal operation of the switching unit 1, when transmitting information, the active level signals are necessarily present in one or several lines of both bus 14 and bus 15, the occurrence of an active level signal in one or several bus lines 14 (15) in the absence of this signal in all bus lines 15 (14) is regarded as a device as an emergency situation in tires 14 and 15. This situation is fixed in block 12, where the output of circuit 34 or 35 comparisons appear the signal of the zero level and at the output 30 of the element EXCLUSIVE OR 36 a signal of the level of the logical unit appears. This signal is recorded in accordance with

The dead register bit of the 9th state register and the interruption of the interruption unit 10 starts, as a result of which the interruption signal is sent to the bus 18. In addition, the logic unit level signal is fed to the input of the AND 37 element. When trigger 6 is triggered from the output of the AND 37 element, the logic level 1 signal is transmitted through the OR 39 element to the control input of the relay 40, and the power supply of the i switching circuit is disconnected from its input 31. Emergency situations in tires 14 and 15 are caused by the failure of the transmitting amplifiers of the switching unit I of another interface device, the level 1 signal at the input of the AND 37 element is present for the entire duration of the control signal from the trigger output 6 pa, and its release of the relay 40 again connects the power switching unit 1 it rto vho- controller 31.

If the emergency situation in tires 14 and 15 is caused by the failure of the transmitting amplifiers of the switching unit 1 of this device, when the power supply of the switching unit 1 is disconnected, its input 31 and the output 30 of the unit 12 will receive a level 1 signal, a trigger 38 is triggered The 1 input contains a level 1 from the trigger output 6), and from its output through the OR 39 element, a power cut signal to the 40t relay is acknowledged

Thus, in the event of an emergency situation in tires 14 and 5, the device ensures the operability check of the output amplifiers of switching unit 1 by briefly disconnecting the power of switching unit 1. If, as a result of the health check, it is established that the cause of the emergency situation in tires 14 and 15 is the output amplifiers of this device, then after removing the control signal from the output of trigger 6, the power supply of unit 1 does not connect the switching of this device.

When an emergency situation is fixed in tires 14 and 15, the process of checking the operability of the switching unit 1 of devices matching the associated micro computers to a homogeneous computing system occurs sequentially in the system, regulated by the triggering of the corresponding trigger 6 of each device and ends after switching off the faulty switching unit 1.

In addition, the proposed device, along with the implementation of the process of automatic diagnostics and blocking faulty amplifiers of the switching unit 1, initiates the structure restructuring process by interrupting the computational process in all microcomputers of the system. In this case, the microcomputer system dispatcher in the processing mode of the gate detects the contents of state register 9 and, determining that the automatic diagnostics and malfunction blocking operation is performed, through the time required for the consecutive triggers 6 of all devices connected to the system in the individual exchange mode tests the elementary 1x machines, detects an elementary machine with the switching unit turned off, and reallocates the parallel processing program if necessary.

Claims (1)

Invention Formula Device for coupling by aut. St. No. 913360, characterized in that, in order to expand the class of tasks of the device by monitoring the state of the system busbars in order to be able to reconfigure a homogeneous computing unit  913271 system, a trunk state decryption unit and a channel blocking unit are entered, the first and second inputs of the trunk state decryption unit are connected to the first and second device inputs and outputs, respectively, and the output to the second block input, information 32 . 2 / " 3 " Fi9.3 1610 the input of the sign connected to the trigger output, and the output to the power input of the switching unit and the fourth information input of the status register, the fifth information input of which is connected to the output of the trunk state decryption unit and the second input of the interrupt unit. 33 18 R /five J5 36 thirty 22 thirty V / f 37 fig  f. with xj 38 J3 W