SU1322371A1 - Device for writing information in internal storage - Google Patents

Abstract

The invention relates to computing and can be used in systems for collecting and storing information. The aim of the invention is to improve the reliability of recording information in the RAM. The device contains a data I register, a memory block 2, a trigger 3, elements AND 4, 5, a comparison block 6, a register of 7 polling cycles, counters 8, 13, 18, an OR 9 element, a switch 10, an information input block 12, a driver 14 control pulses, decoders 15, 16, generator 17 clock pulses. In the device, the code of each information word coming from the mobile carrier is recorded in the memory block at the moment of the formation of this code with the greatest reliability, and this moment is determined by cyclically counting the sum of code units and comparing the sums of the subsequent and previous cycles. I il. (L 00 to with

Description

The invention relates to computing and can be used in information collection and storage systems.

The purpose of the invention is to increase the reliability of recording information in the RAM.

The drawing shows a block diagram of a device for recording information in an on-line memory.

The device contains data register 1, memory block 2, trigger 3. first 4 and second 5 elements AND, comparison block 6, register 7 polling cycles, second counter 8, element OR 9, switch 10 with AND elements II, information input block 12 , the third counter 13, the imaging unit (14 I.M. control pulses, the first 15 and the second 16 decoders, the generator 17 clock pulses, the first counter 18.

The device works as follows, it follows.

In the initial state, registers 1 and 7, counters 8, 13 and 18 and trigger 3 are reset. When the generator 17 is switched on, the pulses from its output are fed in series to the counting input of the counter 18, which, together with the decoders 15 and 16, form pulse distributors. In one cycle of operation of the distributors, the following operations are performed: using the decoder 15 and the switch 10, sequential polling of the signals from the output of the information input unit 12, then using the decoder 16 - polling the outputs "more - equal and equal" to the comparison unit 6 through the elements 4 and 4 5, then the recording of information in the register 7, resetting the register 1, the trigger () and 3 and the counter 8. rioc. i.e. performing the above operations, the operation cycles of the distributors are repeated. When the information carrier, for example, a puncture carrier, moves, the outputs of the information input unit 12 generate signals corresponding to the perforations of this information line of the carrier and arriving at the first inputs1) 1 of elements AND II of the switch 10. In one cycle of operation of the decoder 15, the signals from the outputs of unit 12 sequentially are processed and through the switch 10 and the element OR 9 are fed to the counting input of the counter 8. Since the speed of movement of the carrier is many times less than the polling rate of the block 12 by the decimator 15, then during the movement of the carrier each Information line cyclically repeatedly op- rap1ivaets said distributor. In this case, the total number of signals at the outputs of block 12, successively from cycle to polling cycle, approaches the actual number of perforations of this information line. Thus, the counter 8 records the number of perforations of the carrier string.

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in this cycle. The code of this number from the outputs of counter 8 is fed to the first inputs of the comparison unit 6, the second inputs of which are supplied with the code from the outputs of register 7. For the first operation cycle of the device, the code of register 7 is zero, and since the number at the outputs of counter 8 is greater than the number at the outputs of register 7 , then on the first output of block 6 of the comparison, the signal "More, which prepares

0 to open element 4. After interrogating block 12 by decoder 15, decoder 16 begins to work in this cycle. Pulse from first output of decoder 16 opens element 4 and allows recording information from outputs of block 12 to register 1. Pulse from second output of decoder 16 rewrites counter code 8 into register 7. I. pulse from the third output of the decoder 16 zeroes counter 8 and the next polling cycle of the outputs of block 12 begins

0 by the decoder 15. In the following cycles, due to the movement of the carrier, the number fixed by the counter 8 successively approaches the true number of perforations of this information line. Moreover, in each subsequent cycle, this number of counter 8 is compared with the number m recorded in register 7 in the previous cycle and is greater than or equal to it. In this case, the process described is repeated without change. Upon further movement of the carrier, the separation section between the information lines of the carrier enters the input block. In this case, the number of perforations and, accordingly, the number of signals at the outputs of block 12 begins to decrease. In the corresponding polling cycle, the number in the counter 8 will be less than the number recorded in register 7. At this time, the comparison block 6 generates a "less signal" that closes the AND 4 element and prepares the AND 5 element for opening.

0 reliable code of this information line. The impulse from the first output of the decoder 16 opens the element I 5 and the setting} pushes trigger 1 into one state. Trigger 3 permits writing information from register 1 to memory block 2 at the address given by counter 13. Then impulse from the second decoder output 16 similarly, counter 8 code is rewritten into register 7. A pulse from the third output of the decoder 16 zeroes trigger 3 and counter 8. After resetting trigger 3, driver 14 generates a pulse at the trailing edge of the potential signal that increases counter y and 13 tanavlivaet next address for the memory unit 2. Further, when

5, the movement of the carrier (its separation section), the counter 8, the registers I and 7 remain in the zero state, and the device is ready to write the code of the next line.

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Claims (1)

Claims of the invention of memory, it contains a register data and poll cycle register, third A device for recording information in a counter, a pulse shaper control memory, containing a generator and a comparison unit, information-clock signals, the output of which the co-inputs of the polling cycle register are connected to the counting input of the first counter, are connected to the second outputs of the second counter the outputs of which are connected to the counter and the first group of inputs of the block to the corresponding inputs of the first and second comparisons, the control input of the registrar of the third decryptors, the outputs of the first decade-cycles of the survey are connected to the second output p the torus is connected to the corresponding control-second decoder, the register outputs cyclical inputs of the switch, the interrogation information is connected to the second group whose inputs are the information inputs of the comparator, outputs the block inputs of the device, and the outputs of the comparison are connected respectively from the permutator are connected to the inputs by elementary inputs of AND elements, the output of the first OR, the output of which is connected to the counting element AND is connected to the control input of the second counter, the reset input of which is -g data register input, and The informational ports are connected to the third input, the second decryption inputs of which are connected to the information receiver, the first output of which is connected to the device inputs, the information second inputs of the first and second element outputs of the data register are the outputs AND, the output of the second element AND are connected by the device data, the input is formed by the counting input of the trigger, the reset input of the co-body of control pulses is connected to the third connected to the third output of the second-to-20 control output of the device, the output of the digester, the output of the trigger is ow-forma Atel control pulses - is the control output of the apparatus, by-count input to the third counter different lichayuschees in that, in order to increase dnye p outputs of which are Location- reliability of information recording in one-GOVERNMENTAL device outputs.