SU1314352A1 - Digital filter - Google Patents

Abstract

The invention relates to computing and can be used in systems for processing seismic, acoustic, video and other signals. The purpose of the invention is to simplify the device. The goal is achieved due to the fact that the K / 2 registers of the first group enter the device (K is the length of the filter impulse response) 1.1-1.K / 2, K multipliers 2.1-2.K, K / 2 adders of the first group 3.1- Z.K / 2, K / 2 adders of the second group 4.1-4. K / 2, K / 2 registers of the second group 5.1-5.K / 2 and the corresponding connections between the nodes of the device. 1 il. 5S (L o: oo ate Yu

Description

The invention relates to computing and can be used in systems for processing seismic, acoustic, video and other signals.

The purpose of the invention is to simplify the device.

The drawing shows a block diagram of a digital filter.

The digital filter contains К / 2 registers 1.1, 1.2, ..., 1-К / 2 of the first group, К multipliers 2.1, 2.2, ..., 2.К, К / 2 adders 3.1, 3.2, ..., 3 . K / 2 of the first group K / 2 adders 4.1, 4.2, ..., 4. K / 2 of the second group, K / 2 of registers 5.1, 5.2, ...., 5. K / 2 second group.

When implementing a digital filtering procedure, a device must compute an expression like

Y (n) 1 w (J) 1), (1)

where (o (L) are the coefficients of the impulse response of the digital filter, X (N) are in the second counts), Y (N) are the output counts, K is the number of coefficients of the impulse response of the digital filter. Expression (1) can be rewritten as

Y {n) .f s () X () +

+ co (2i) X (p-2i-f 1) (2)

After each cycle of operation of the digital filter, equal to the response time of two adders and one multiplier, a new input sample is fed to the input of the filter. At the outputs of the registers l.i and S.i (i 1, К / 2), the information changes at the beginning of each filter cycle. In the first cycle of operation, the input of the filter is X (1), in the second — X (2), and so on. The first (K / 2-1) filter operation cycles are idle, since the calculation of the "full output samples T (n) begins after the output of the register 1.K / 2 reads the X (1) count.

Consider the example of the filter for case K 6.

In K / 2, the 3rd cycle to the inputs of registers 1.2 and 1.3 is fed to the initial samples X (2) and X (3), respectively. In the multiplier 2.5 and 2.6, the products X (2) m (5) and X (1) (o (6), respectively) are formed and through the adder 3.3 are fed to the input of the adder 4.3.

In the 4th cycle, the partial output count Y (6) i X (l) a) (6) -f X (2) a) (5) is entered in register 5.3 of the second rus.

In the same clock cycle, the input samples X (4), X (3) and X (2) respectively arrive at the inputs of registers 1.1, 1.2 and 1.3. In the multipliers 2.5 and 2.6, the products X (3) ((5) and X (2) ω (6) are formed, respectively, and through the adder 3.3 arrive at the input of the adder 4.3. In multipliers 2.3 and 2.4, the products X (4) and (3) and X (3) w (4) are formed, respectively, and through the adder 3.2 are fed to the first input of the adder 4.2, to the second input of which from register 5.3 enters Y (6), .

0

five

0

five

0

five

0

five

0

five

In the 5th cycle, registers 5.3 and 5.2 bring in partial output samples Y (7) i X (3) (o (5) -f X (2) a (6) and Y (6) (6) i + -f X (3) w (4) + X (4) from (3) respectively. In the same clock cycle, the inputs of registers 1.1, 1.2 and 1.3 receive the initial samples X (5), X (4) and X (3) The multipliers x 2.5 and 2.6 form the products X (4) w (5 and X (3) a) (6), respectively, and through the adder 3.3 arrive at the first input of the adder 4.3. The multipliers 2.3 and 2.4 form the products Y {7 ) i and X (4) w (4), respectively, and through adder 3.2 arrive at the first input of adder 4.2, to the second input of which from register 5.3 comes Y (7) i. In multipliers 2.1 and 2.2, the products X (6) w (1) and X (5) w are formed (2, respectively, and through the adder 3.1 of the first group arrive at the first input of the adder 4.1, the second input of which from the register 5.2 enters Y (6) 2

In the next 6th clock cycle, in register 5.3, the partial output count Y (8), X (3) w (6) + X (4) w (5) is entered, register 5.2 Y (7) co (4) + X (5) co (3) + Y (7) i X (4) Xw (4) + X (5) to (3) (2) co (6j + X (3) a) (5) in register 5.1 The first "full output count Y (6) 3 Y (6) 2+ X (5) with (2) + -f X (6) S (1) X (1) W (6) + X (2) with (5) + + X (3) w (4) + X (4) with (3) + X (5) with (2) H + X (6) w (1), which is then fed to the output of the filter.

Claims (1)

In each subsequent cycle, a new output sample appears at the filter output. Invention Formula A digital filter containing K multipliers (K is the length of the filter impulse response), / (/ 2 adders of the first and second groups, / C / 2 registers of the first and second groups, with the first input of the / th (/ 1, K.) the multiplier is the input of the setting of the / -th filter coefficient, the first input of the / (the 2nd adder of the second group is the input of the setting of the logical zero of the filter, characterized in that, for the sake of simplification, the output of the i-th (/ 1, К / 2 ) the adder of the second group is connected to the information input of the second register of the second group, the output of the 1st {/ 2, K. / 2) register of the thief group is connected to the first input of the (/ -1) -th adder of the second group, and the output of the first register of the second group is the information output of the filter; the second inputs of the 2nd g and (1) -th multipliers are connected to the information input of the (i + 1) -th register groups and are connected to the output of the gth register of the first group, the information input of the first register of the first group is connected to the second input of the first multiplier and is the information input of the filter, the outputs of the (2i-1) -th and 2d-th multipliers are connected respectively to the first and second inputs of the ad group of the first group, output D of which is connected to the second input (-th adder of the second group.