SU1309288A1 - Multithreshold complementary-metal-oxide-semiconductor current comparator - Google Patents

Abstract

The invention can be used for the construction of coding transducers, as well as in the control and measuring units of automation. The purpose of the invention is to expand the measurement range while maintaining accuracy. The multi-threshold CMOS current pair contains N p-channel MOS transistors 1 -... - N, an additional n-channel MOS transistor 3, N-1 p-channel. MOS transistors 2-1 ... 2- (N-1 ). reference current generator 4, measured current source 5, and current mirror 6. The proposed functional connection of circuit elements, and the fact that all n-channel MOS transistors are identical and have equal power dissipation, allows to achieve a high identity of their parameters, and therefore, high accuracy of the reference current installation. This makes it possible to perform a current comparator with a significantly larger number of thresholds and to disperse the range of current measurements. I il. With SS - § § so about soyu 00 00

Description

The invention relates to a pulse technique and can be used to construct coding transducers, as well as in the control and measurement units of automation.

The aim of the invention is to expand the range of current measurement while maintaining accuracy due to the possibility of increasing the number of thresholds.

The drawing shows a schematic diagram of a multi-threshold CMOS current comparator.

The proposed current comparator contains N p-channel MOS transistors 1 -1-4-1-N, the drains of which are outputs of the device, the sources are connected to a zero-potential bus connected to the N-1 gates of p-channel MOS transistors (N- 1), connected by sources, respectively, between the drains of neighboring n-channel MOS transistors 1-1P-1-N, and the gates of all n-channel MOS transistors 1-24-1-1 N are connected to the drain of an additional p-channel MOS transistor 3, the gate of which is connected to the gate of the first n-channel MOS transistor 1 - 1, and the source - with the bus zero potential, while the drain of the additional p-channel MOS transistor 3 is connected to the output of the reference current generator 4, and the source 5 of the measured current is connected to the source of the first n-channel MOS transistor 1 - 1 through the current mirror b, channel MOS transistors 7 and 8.

The device works as follows.

The output current Ion of the reference current generator 4, using current mirrors formed by the auxiliary transistor 3 and n-channel MOS transistors 1 -1, multiplies to form N identical reference currents 1ol,

 1i, The measured current 1, reflected by the current mirror 6, flows to the connection point of the drain of the transistor 1-1 and the source of the transistor 2-1.

At 1x O, all n-channel transistors 1 -1--1-N are in saturation mode, and low potentials, i.e., zero, are set at the device outputs. All p-channel MOS transistors 2--1-H-2- (N-1) are locked because their threshold voltages are much higher than the drain-source voltages of saturated MOS transistors 1-14-1-N. With an increase, the current initially flows through the drain of the source of the MOS transistor 1–1. But as long as,, the transistor 1–1 remains in a saturated state, and zero is left at the outputs of the comparator. Transistor 1 - 1 goes out of saturation and goes into the active area of work when 1x reaches the value 1 | l, 1.L. This leads to a sharp

the rise of the source-drain of the transistor 1 - 1, equal to the gate voltage-source of the transistor 2-I.

When this voltage exceeds the threshold values of the voltage across the gate of transistor 2-1 equal to several volts, transistor 2-1 opens, opening the way for excess current to flow. The first output is set to "I, i.e. high potential equal to the threshold voltage of the transistor 2-1.

With a further increase in I, the difference current Ijf - Ion, -1o „flows through the source-drain of transistor 2-1 and the drain-source of transistor 1-2. When 1x reaches

Bp, + I “,, a high potential of" 1 "is also established at the second output of the comparator, since transistor 1-2 exits saturation mode and unlocks transistor 2-2. Similarly, the following p-channel unlocks

MOS transistors and the transition to the active mode of operation of n-channel MOS transistors with a further increase in the measured current 1x.

Thus, when current flows j

Ion 1g- (j + 1) Ion on the first, second

The J-M outputs of the comparator are set to "i, and on the remaining outputs there is an" O. The current L is converted to a single unitary code.

Due to the fact that in the proposed device all n-channel MOS transistors are made the same and have equal power dissipation, a high is achieved - the identity of their parameters, and consequently, the accuracy of setting the reference currents. This allows the comparator to be performed.

current with a significantly larger number of thresholds and expand the current measurement range. In addition, in the proposed device, by reducing the values of the reference currents, the sensitivity of the comparator can be increased,

determined by the minimum values

currents Ion, Ion lon ,, --- loaw

The sensitivity of the well-known multi-threshold CMOS current comparator, determined by the difference in threshold levels of the comparator, is limited by the accuracy with which the current mirrors of the reference current are dissipating with increasing power dissipation of the transistors of the current mirrors.

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Claims (1)

Invention Formula Multithreshold CMOS current analyzer containing N p-channel MOS transistors, whose drains are outputs, sources are connected to a zero potential bus, the gates of all n-channel MOS transistors, except for the first, are connected channel MOSFET, the gate of which is connected to 1309288. 3 the gate of the first p-channel MOS-trans-switched on respectively the source-drains of the p-casistor, and the source - with the bus of zero potential transistors, the gates of which diala, reference current generator, N-1 p-ka-connected to the zero potential bus, MOSFETs, the source of the reference current generator output is connected measured current and current mirror, I distinguish-j with an additional p-channel drain This is due to the fact that, in order to expand the range MOS transistor, and the output of the current-measuring source, while maintaining the measured current, is connected via a current between the racks of neighboring p-channel-mirror to the drain of the n-channel MOS transisal MOSFET transistors of the sequence.