SU1307388A1 - Digital phase shift device - Google Patents

Abstract

The invention of: measurement technique and can be used in phase memory devices. The purpose of the invention is to measure the accuracy of the device operation. The digital phase shift device contains triggers 1–3, elements 4 and 5, generator 6 pulses, block 7 of the spreading code, block 8 comparison and counter 9 “Introduction of the element OR 10 and the formation of new functional communication eliminates the issuance of false pulses during reset and change the contents of the counter 9. 1 Il. n ft- 00 CX)

Description

The invention relates to measuring and pulse techniques and can be applied in phase memory devices.

The purpose of the invention is to improve the accuracy by eliminating the occurrence of false pulses during a reset and changing the contents of the counter.

The drawing shows a block diagram of a digital device phase shift.

The digital phase shift device contains the first 1, second 2 and third 3 triggers, the first 4 and second 5 elements, the generator 6 pulses, block

7 forming codes, block 8 of comparison, counter 9 and the element OR 10.

The S input of the first trigger 1 is connected to the R input of the counter 9 and the output of the second element AND 5, the first input of which is connected to the S input of the second trigger 2, and the second to the direct output of the third trigger 3 whose R input is connected with the direct output of the first trigger 1 and one input of the first element 4, the second input of which is connected to the output of the pulse generator 6, and the T input of the code generation unit 7, and the output to the T input of the pulse counter 9, the outputs of which are connected to one block inputs

8 comparison, the other inputs of which are connected to the outputs of the block 7 of forming codes, and the output - with the R-input of the second trigger 2, the output of which is connected to one input of the element OR 10, the second input of which is connected to the pulse output of the first trigger

1, and the output is with the K input of the code generation unit 7.

Digital device phase shift works as follows.

From the first input terminal of the device pulses of frequency f with an arbitrary phase nocTynaFOT to the S input of the second

trigger 2 and set its single state. The pulses through the second element And 5 do not pass, since it is closed at the second input by the zero potential from the output of the third trigger 3 ..

The second input terminal of the device receives pulses with the same frequency f, the phase of which is necessary to adjust the pulses coming to the first input terminal. The pulses entering the input of the first trigger 1 from the second input terminal of the device.

five

ABOUT

 -

five

five

0

0

five

0

confirm the zero state of the trigger 1,

Zero potential from the output of the first trigger 1 prohibits the passage of pulses to the T input of the counter 9 pulses from the generator 6 via the second input of the first element I 4.

The capacity of the counter 9 and the code generation unit 7 is equal to N. The N code corresponds to the phase shift and to the BdO. Suppose counter 9 is recorded

code K -r-, then after the transition

the second trigger 2 into a single state its output voltage is applied through the element OR 10 to the R input of the code generation unit 7 and enables it to operate. The pulses from generator 6 to the T input of the code generation unit 7 change its state from O to K. After half of the period, the counter codes 9 and 7 forN block 7

The code scans are equal and at the output of the comparator unit 8, which is the output of the device, a pulse appears that arrives at the R input of the second trigger 2 and sets it to the zero state.

In each input period, the operation of the device is repeated.

When it is necessary to change the phase of the output pulses and make it equal to the phase of the reference frequency supplied to the second input terminal of the device, a short pulse is applied to the third input terminal of the device, which goes to the S input of the third trigger 3. The pulse with frequency f from the first input terminal of the device passes through the second element And 5, opened on the second input by a single potential from the code of the third trigger 3. I

Next, the pulse arrives at the B-input

the first trigger 1 and sets it to one, and in addition, resets the counter 9. A reference frequency pulse arriving at the R input of the first trigger 1 returns it to the zero state. For the time that the first trigger 1 is in the single state, the zero potential from the inverse output of the trigger 1 through the element OR 10 blocks the operation of the code generation unit 7 on the R input. The negative voltage drop from the direct output of trigger 1 is fed to the R input of trigger 3 and

brings it to its original zero state. The second element And 5 is then closed at the second input for the passage of pulses from the first input terminal of the device to the S input of the trigger 1, which, under the action of pulses from the second input terminal of the device, remains in the zero state. Therefore, the first element 4 on the second input output voltage from the first trigger 1 is open for the passage of pulses from the generator 6 to the T input of the counter 9 for a time equal to the phase difference between the pulses fed to the first input terminal of the device and the pulses of the reference signal to the second input terminal of the device.

A code is stored in the meter, the phase difference is equal, and the device operates as described, while the phase of the output pulses is equal to the phase of the reference signal.

Thus, the device allows you to avoid the occurrence of spurious pulses when the counter is reset and in the process of writing the phase difference code to the pulse counter.

Claims (1)

Invention Formula A digital phase shift device containing a pulse counter, a comparison unit, a code generation unit, two AND elements, three triggers and a pulse generator, the output of which is connected to the T input of the code forming unit and the first input of the first And element, the second input of which is connected to the direct output of the first trigger, and the output of the first element I is connected to the T input of the counter, the outputs of which are connected to the inputs of the code comparison unit, the other inputs of which are connected to the outputs of the code generation unit, while the output of the comparison unit is connected with the output terminal of the device and the R-input of the second trigger, the S- input of which is connected to the first input terminal of the device and the first input of the second element I, while the second input of the latter is connected to the direct output of the third trigger, and the output is connected to the S-input of the first trigger The R input is connected to the second input terminal of the device, the S input of the third trigger is connected to the third input terminal of the device, and the R input to the direct output of the first trigger, characterized in that, in order to improve accuracy by eliminating false impu During the reset and change of the held counter, the device additionally introduces an OR element, the first input of which is connected to the direct output of the second trigger, the second input to the inverse output of the first trigger, and the output to the K input of the code generation unit; - the input of the counter and mylcov is connected to the output of the second element I, .s. f. GO "Ji L ± J Kg ai izhptgmil I A ncicznni rO tm. fm J Compiled by M.Katanova Editor A.Revin Tekhred L.Serdyukova Proofreader M.Demchik Order 1628/45 Circulation 731 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsl nab., f, 4/5 Production and printing company, Uzhgorod, ul. Project, 4 I l o