SU1300468A1 - Random process generator - Google Patents

Abstract

The invention relates to computing and can be used to simulate a random field. The aim of the invention is to extend the functionality of the generator by obtaining a three-dimensional distribution. The generator contains discriminators 1, 2, memory block 3, switch group 4, group of blocks 5 elements OR, group of comparison circuits 6, generator of random numbers 7, group of keys 8, group of IS-TO4HHift) B 9 constant voltage, adder 10 , delay elements 11, 12, memory block 13, delay element 14, 15 clock pulse generator, Start signal source 16. 1 il. e (L 1C with 4 Oti OG

Description

The invention relates to computing and can be used to simulate a random field.

The aim of the invention is to enhance the functionality of the Generator by obtaining a three-dimensional distribution.

The block diagram of the generator is shown in the drawing,. The generator contains discriminators

II and 2, memory block 3, switch group 4, block of blocks 5 elements OR, group of comparison circuits 6, generator 7 of random numbers, group of keys 8, group of sources 9 constant voltage, adder 10, - elements

II and 12 delays, memory block 13, delay element 14, 15 clock impulse generator, 16 Start signal source.

The generator works as follows.

Preliminary, in the first row and the first column of the memory cells of the memory block 13, the field values generated by some sample are recorded, for example, uniformly distributed random numbers.

The generator is started by applying a source start signal. t6 signal. The generator starts with 15 clock pulses.

At the initial moment of time, discriminator ator 2 reads from the memory block 3 the numbers that arrive at the inputs of the switches 4, the latter are opened with signals from the output of the discriminator, 10

15

20

25

thirty

35

tea number from the generator output 7 random numbers. At the output of the adder 10, the first generated value appears. This value is also entered into the second memory cell of the second row.

Next, start with the next cycle of the generator in the same way as described above.

Claims (1)

Invention Formula A random process generator containing a group of comparison circuits, the outputs of which are connected to the control inputs of the corresponding group keys, whose information inputs are connected to the outputs of the corresponding constant voltage sources of the group, d and the outputs of the keys are connected to the group of inputs of the adder, respectively, the output of which. connected with the information. the input of the first memory block, the generator case-. tea numbers, two comparators, the second memory block, characterized in that, in order to expand the functionality of the generator by obtaining a three-dimensional distribution, it contains a group of switches, a group of OR blocks, three delay elements, a clock pulse output connected with the synchronizer input of the adder, with the input of the first element: the delay and with the input Poll random number generator, the output of which Minator 1. The number of outputs selected-40 is connected to the first inputs of the circu. Switch 4 through the corresponding blocks of the 5 elements OR is fed to the second inputs of the corresponding comparison circuits 6. At the same time, a random number from the generator output of 7 random numbers interrogated by pulses from the generator output of 15. clock pulses is fed to the first inputs of the comparison circuits. This random number is compared with the numbers on the nepBbix inputs of the comparison circuits 6. As a result, a signal appears at the output of one of the comparison circuits 6, which opens the corresponding switch 8. The latter passes a constant value to the input of the adder 10 from the output of the corresponding constant voltage source 9, At the other input of the adder 10, through the delay element 11 is transmitted group and with the input of the second delay element, the output of which is connected to the input of the adder, the output of which is the generator output and f is connected via a third delay element to the input of the first discriminator,. groups of outputs of which are connected to control inputs of respective switches of the group, groups of information inputs of which are connected respectively to groups of outputs of the second memory block, output of the first delay element is connected to readout of the input of the first memory block whose output is connected to input of the second discriminator, group the outputs of which are connected respectively to the group of connecting inputs of the second memory block, the outputs of the element blocks 50 55 five 0 five 0 five tea number from the generator output 7 random numbers. At the output of the adder 10, the first generated value appears. This value is also entered into the second memory cell of the second row. Next, start with the next cycle of the generator in the same way as described above. Invention Formula A random process generator containing a group of comparison circuits, the outputs of which are connected to the control inputs of the corresponding group keys, whose information inputs are connected to the outputs of the corresponding constant voltage sources of the group, d and the outputs of the keys are connected to the group of inputs of the adder, respectively, the output of which. connected with the information. the input of the first memory block, the generator case-. tea numbers, two comparators, the second memory block, characterized in that, in order to expand the functionality of the generator by obtaining a three-dimensional distribution, it contains a group of switches, a group of OR blocks, three delay elements, a clock pulse output connected with the synchronizer input of the adder, with the input of the first element: the delay and with the input Poll random number generator, the output of which connected to the first inputs of the circu. group and to the input of the second delay element, the output of which is connected to the input of the adder, the output of which is the output of the generator and is connected via the third delay element to the input of the first discriminator,. groups of outputs of which are connected to control inputs of respective switches of the group, groups of information inputs of which are connected respectively to groups of outputs of the second memory block, output of the first delay element is connected to readout of the input of the first memory block whose output is connected to input of the second discriminator, group the outputs of which are connected respectively to the group of connecting inputs of the second memory block, the outputs of the element blocks 313004684 Commands OR groups are connected to the second nations of the reproducible function of the distribution inputs of the corresponding circuits, comparisons) of the switch are connected to ki groups, the outputs of each i-ro are the i-th inputs of the corresponding blocks (i 1, N, N are the number of points of the approximate elements OR groups.