SU1464067A1 - Eddy-current device for nondestructive inspection - Google Patents

Abstract

The invention relates to non-destructive testing and can be used to control the quality of electrically conductive objects. An increase in productivity and control accuracy is achieved by automatically setting the reference voltage in the phase difference meter. In the setting mode, on the section with the nominal parameters of the controlled object using a divider 13. frequency, trigger 11, circuits 10 and 12, a reference voltage is formed. During the control, the phase of the voltage introduced into the eddy current converter 5 is changed and the phase difference is measured relative to the phase of the reference voltage set in the setting mode. The error associated with the delay of the reference signal due to the switching of the elements forming it is compensated by the introduction of the delay line 8 in series with the signal input of the phase difference meter 9.2 or later. (L

Description

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The invention relates to non-destructive testing and can be used to control the quality of electrically conductive products.

The purpose of the invention is to improve the performance and reliability of control due to the automatic installation of the reference voltage in the phase difference meter.

Fig. 1 shows the structural scheme of the proposed eddy current device f in Fig. 2 — voltage plots illustrating the operation of the device.

The device contains serially connected 1 clock pulse generator, first frequency divider 2 with variable division factor, sinusoidal voltage shaper 3, power amplifier 4, eddy current transducer 5, limiting amplifier 6, shorter pulse shaper 7, line 8 the delay and the phase difference meter 9 connected in series the first coincidence circuit 10, the input of which is connected to the output of the driver 7, the trigger 11, the second coincidence circuit 12 and the second frequency divider 13 with variable coefficient a dividing agent, the output of which is connected to the second input of the phase difference meter 9, as well as a memory unit 14, the first output of which is connected to the second control input of the first frequency divider 2, and the second output to the second input of the first coincidence circuit 10.

The device works as follows.

The clock pulse generator 1 generates a continuous sequence of 15 (FIG. 2) pulses, arriving at. the input of the first controlled splitter 2 frequency with a variable division factor. The division factor N divider 2 is specified by memory unit 14, from the first output of which a code is sent to the second control input of divider 2, which specifies the N division factor of the frequency divider. At the exit to the last, a sequence of 16 short pulses is formed, barely

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blowing with a period

I &. 2,

T-N, post-Phases of sequences 19 and 23 at the output of the second divider 13 of the frequency and shaper 7 also coincide with a sufficient degree of accuracy determined by the sampling error on the shaper 3 of sinusoidal voltage. From the output of the last-55 and the delay of the signal due to the charge through the amplifier 4, the power of the sinusoidal signal 17 with the period Tg enters the eddy conversion of the circuit elements. The second component of the error can be compensated by introducing into the scheme

ten

25

- 15 20 - 30

35

50

The transmitter 5, from the output of which is located near the product with nominal parameters (not shown), the signal 13, which has changed in amplitude and phase, is fed to the series-connected amplifier-limiter 6 and shaper pulse generator, at the output of which short duration pulses 19 are formed. with the moments of the transition of the sinusoidal signal 18 through the zero level as it increases

The device is tuned by successively applying a setup signal to the zero state (Setup) to the second frequency divider 13 and the trigger 11 and, with some delay, the enabling signal (Comp.) 20 arriving at the second input of the first coincidence circuit 10.

At the moment when the first pulse arrives at the second input of the circuit 10 after the resolution signal 20 has been established, a signal 21 appears at the output of the circuit 10 of the coincidence 10, which sets the trigger 11 into a single state. Subsequent pulses arriving at the single input of the trigger 11 do not change it — the states. At the moment of switching of the trigger 11, an output potential is generated at its output, which is fed to one of the inputs of the second matching circuit 12, and through the last pulses 22 from the generator 1 is fed to the input of the second frequency divider 13. The division factor of the second divider 13, formed on the second output of the memory unit 14, is set to 2N. Thus, at its output, a sequence of 23 pulses is formed, having a frequency of two times smaller than a sequence of 16, i.e. the period of the sequence 23 coincides with the period Tg of the sinusoidal signal and, accordingly, with the period at the output of imaging device 7,

The phases of sequences 19 and 23 at the output of the second frequency divider 13 and driver 7 also coincide with a sufficient degree of accuracy determined by the sampling error of 55 and the signal delay due to the signal and delay due to switching circuit elements. The second component of the error can be compensated by introducing the

15

The delay line 8 operates through which a sequence of short pulses from the driver output is fed to the first input of the meter 9 phase difference. This completes the tuning process and removes the enable signal (Comp.) From the first matching circuit 10, but since the trigger 11 is in the one state, the formation of the sequence 23, connected to the second input of the phase difference meter 9, continues. At the same time, both sequences of 19 and 23 pulses entering the meter 9 phase differences coincide in phase.

In the process of control, if there is a product in the vicinity of the vortex converter 5, which differs in its parameters from the nominal one, the output-2 o phase of the signal 24 changes. This leads to a change in the phase sequence of 25 short pulses at the output of the driver 7. The phase of the pulse sequence from the output of the frequency divider 13 remains the same and corresponds to the initial phase of the output signal of the eddy current transducer 5. The phase difference of the signals 26 is measured by a phase difference meter 9.

The device setup process, i.e. Shaping sequence 19 is recommended to be repeated periodically.

It is possible to form a sequence of 19 pulses .. not in phase with the output signal of the high frequency converter 5, but in antiphase. For this it is necessary.

with the moments of transition of the sinusoidal signal 18 through the zero level, but when the signal decreases 18.,

Claims (1)

Invention Formula Eddy current device for non-destructive testing, containing a series-connected clock generator, a controlled frequency divider, a sine-shaper voltage driver, an amplifier, a swirl converter, a limiting amplifier, a pulse-shortened meter and a block a memory connected by an output to a control input of a controlled frequency divider, which is so that, in order to increase the performance and reliability of the control, it is equipped with a dead line ki connected between the pulse shaper truncated 25 and a phase difference meter connected in series by a first coincidence circuit, a trigger, a second coincidence circuit, and a second controlled frequency divider connected by a control input to the second output of the memory unit and an output to the reference input of the phase difference meter; connected by the first input to the output of the shortened pulse generator and the second input to the enable signal bus, the second trigger input and the second control input of the second frequency divider are connected to the zero setting bus, and the second 36 so that the shaper 7 of the shortened IM-40 OD of the second coincidence circuit is connected to pulses to generate pulses of short duration that coincide in time with the output of the generator owls. clock pulse with the moments of transition of the sinusoidal signal 18 through the zero level, but when the signal decreases 18., h Invention Formula Eddy current device for non-destructive testing, containing a series-connected clock generator, a controlled frequency divider, a sine-shaper voltage driver, an amplifier, a swirl converter, a limiting amplifier, a pulse-shortened meter and a block a memory connected by an output to a control input of a controlled frequency divider, which is so that, in order to increase the performance and reliability of the control, it is equipped with a dead line ki connected between the pulse shaper truncated and a phase difference meter connected in series by the first coincidence circuit, a trigger, a second coincidence circuit, and a second controlled frequency divider connected by a control input to the second output of the memory unit and an output to the reference input of the phase difference meter, the first coincidence circuit is connected by the first input with the output of the shortened pulse generator and the second input with the enable signal bus, the second trigger input and the second control input of the second frequency divider are connected to the zero setting bus, and the second OD of the second matching circuit is connected with the output of the generator owls. clock pulse