SU1287133A1 - Pneumatic analog-to-digital converter - Google Patents

Abstract

This invention relates to an automatic control technique. The device contains a set point adjuster 1, a block of repeaters 2 with a shift, and blocks forming 3, 4, 5 higher, middle, and younger groups of bits.

Description

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1287133

Moreover, the use of the standards 9 in the blocks of for- mula switchboards allowed the elder and middle groups to significantly reduce the instrumental bits of the specially organized costs. 1 il.

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The invention relates to the automatic control of instrumentation and can be used in pneumatic and pneumoelectronic systems for monitoring and controlling technological processes.

The aim of the invention is to reduce hardware costs.

The drawing shows a diagram of the proposed pneumatic analog-to-digital converter.

 The pneumatic analog-to-digital converter contains a block of 1 standard detectors, a block of 2 repeaters with a shift, blocks 3, 4, and 5 of forming the highest, middle, and younger groups of bits, respectively, algebraic adder 6, input channel 7, and output channels 8 of the converter. In identically executed units for forming the upper and middle groups of bits, there are switches of 9 standards with outputs 10. In the same blocks, as well as in the formation group of the younger group, additional switches 11 and elements 12 of comparison are contained. The standard switches contain pneumatic relays 13, and the additional switches contain: relays 14. In the standard setters block there are setters 15, each nth of which is tuned to the output signal size (p-1), from the range of their signal change at the converter input, where (p-1) is the numerical equivalent of the binary expression of the number n-1, written in reverse order (for example, for p 7 p -1 (110) 2, A (- (011) 2 3). The offset repeaters block contains repeaters 16, each m-th of which is tuned to a Welshgun positive shift ha 2 from the range .x, where m -. the numerical equivalent of the binary expression of the number m recorded in the reverse order algebraic adder 6 is configured to issue analogo0

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signal, equal in magnitude to the difference of two of its input signals, increased by 2 times.

Pneumatic analog-to-digital Converter works as follows.

The pneumatic analog signal, equal to X from the dx range (O x 1), is fed through the input channel of the converter to the comparison element 12-1 of block 3, where it is compared with the reference signal 1/2 of the setpoint 15.

At X 1/2, a single discrete signal А 1 is formed at the output of this comparison element, which switches the relays of the first stage 14, 14, 14.J of additional switches in block 3. In this case, the comparison element 12.2 of the same block is compared with the signal X receives the reference signal 3/4 of the setter 15. Otherwise (when A 0) the relay connects to the comparison element 12 the reference signal of the 1/4 setpoint 15.

Depending on the results of the comparison of signals on element 12, a discrete signal A is generated. At Aj 1, through relays 14 and 14, one of the reference signals 7/8 (at At 1), 3/8 or 3 goes to the second input of comparison element 12 of block 3. / 8 (with A). If A.0, then relays 14g and 14, connect to this input one of the reference signals 5/8 (with Ai 1) or 1/3 (with).

Depending on the ratio of the input signal x and the reference signal connected to the second input of the comparison element 12 by the additional switch 11 of block 3, a discrete signal O or 1 is generated in the output channel A of the converter.

In the general case, a discrete signal in the output channel of the AC block 3 is formed as a result of comparing the input signal x and the reference signal from the output (N-l) -oro to 3112

optional switch. Moreover, this switch, controlled by signals established in the output channels of the previous higher bits, results in a reference signal (+) - 2, where j is the digital equivalent of the code formed by the signals in the previous bits. For example, if N 4, Aj Aj, 1, A O, then the digital equivalent of a binary three-digit code j is 6, wherein the additional switch connects for comparison with the signal x the 13/16 reference signal, which is the largest of the reference signals commutated from the first to (N-1) -th additional switches that do not exceed the signal x.

The process of blocking the input and reference signals with the choice of subsequent standards based on the result of i in the preceding high j bits, which occurs in block 3, leads to the formation of a code of the largest of the reference signals not exceeding the input signal X. the code is represented by the Signals A, A, ..., A ,.

Simultaneously with the appearance of these signals, the reference signal x corresponding to this code and equal in magnitude

x G A „2

p-1

through the relay of the switch 9 of the standards of block 3 is fed to the negative input of the algebraic adder 6, the output of the adder is processed while the analog signal y, equal in magnitude

y (x-he).

The signal y arrives at block 4 of forming the middle group of bits, in which, like in block 3, discrete signals are generated,

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code of the greatest of

reference signals not exceeding the magnitude of the signal y, but the corresponding reference signal y and J

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is transmitted to the output 102 of block 4 through the switch of standards of this block. The signal y is fed to the inputs of repeaters with a shift of block 2. At the outputs of repeaters of block 2, the signals 2 +1 2 are processed

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y, 4-: 2 2-L .... Y, + (2 -0-2-which, like the signal y, are transmitted to the younger group of bits.

In block 5, the process of a parallel comparison of the signal y with the output signals of the repeaters takes place. analogous to the process occurring in blocks 3 and 4. As a result, in block 5 discrete signals A, A2c42 A2N + M of the code of the largest of the repeaters output signals, not exceeding the signal y, are formed. In this case, the magnitude of the difference between the signal y and the output signal of the repeater corresponding to the code will necessarily be less than the step of adjusting the shift of the repeaters, which is expressed by the ratio

0 O- (UZ + GA,

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) 2-:

-N-m

After substituting the above explanations for the values Y and y, as well as dividing each part of the ratio by the value 2, the ratio

0 X - r A, .2-2

P-1

It follows that

2NtM

X C 2-% t,

where is the quantization error, and 0.

Thus, in the output channels 8 of the converter, the binary code signals of the magnitude of the input signal x, limited to 2 N + M and bits, are set.

Claims (1)

Invention Formula A pneumatic analog-to-digital converter containing a block of standards detectors, a block of repeaters with a shift, identically executed blocks of formation of the highest and middle groups of bits, a block of formation of the younger group of bits, output channels of the converter according to the number of 2 N + M binary bits the master reference block contains 2 master gauges, the shift repeater block contains the shift repeaters, the bit group formation blocks contain comparison elements, the first inputs of which are in the high-end formation block The bits of the bits are connected to the input channel of the converter and the positive input of the algebraic adder, and in the blocks of forming the middle and younger groups of bits - with the output of the algebraic adder, the blocks of formation of the old and middle groups of bits contain the switches of the standards, the outputs of which are connected to the negative the input of the adder and the inputs of the repeaters with a shift, respectively, characterized in that, in order to reduce instrumentation, the number of comparison elements in the formation blocks of the senior and middle groups bits are chosen equal to N, and in the formation group of the lower group of bits equal to M, additional switches are introduced in each block forming the group of bits according to the number of elements of the comparison in the block reduced by one, and each j-th additional the switch consists of j helmets, ids and contains in the JM cascade of pneumatic relays, the control inputs of which are connected to the output of the i-ro element of the same unit, the normally open and normally closed nozzles of the K-th relay in the cascade are respectively connected to the output s (2k-1) th and the 2K-th preceding stage switch, normally open and normally closed nozzle K-th first relay cascade gsada j-ro additional switch in blocks forming elder five 0 five 0 and the middle groups of bits are connected to the outputs (2 + 2K-1) of the go and (2 + 2K) th units, and in the unit for forming the younger group of bits - with the outputs of the (2 + 2K-2) -th and (2- + 2K-1) -shift repeaters, the relay output of the last stage j-ro of the additional switch is connected to the second input (j + 1) -ro of the comparison element of the same block, the output of each of the 2 N + M comparison elements is connected to the corresponding output a converter channel, each switch of standards in the formation blocks of the highest and middle groups of bits contains N pneumatic relays, sequentially connected by connecting the output of the previous relay to the normally open nozzle of the subsequent relay ;, the normally closed nozzles of these relays are connected to the BTopbnvm inputs, and the control inputs of these relays are connected to the output of the corresponding comparison elements of the same unit, the nozzle of the first relay of each switch the standards are connected to the outputs of the first and second setters, respectively, and the output of the last relay / is connected to the output of the standards switch; the second input of the first comparison element in the formation of the lower group of bits is connected to the output of with a shift.